Oscillators – Automatic frequency stabilization using a phase or frequency... – Afc with logic elements
Statutory Invention Registration
1984-12-21
2003-07-01
Pihulic, Daniel T. (Department: 3662)
Oscillators
Automatic frequency stabilization using a phase or frequency...
Afc with logic elements
C331S00100A
Statutory Invention Registration
active
H0002069
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This device relates to signal processing and more particularly the processing of clock signals. Even more particularly this device pertains to processing a clock signal so as to remove the original amplitude- and phase-modulation components from the clock signal.
2. Description of the Prior Art
Various approaches are available for deriving a “clean” clock signal from a noisy signal. One approach uses an adaptively tuned data receiver for reconstructing a noisy digital signal by using a matched filter which is tunable. The tuning is set by a timing signal which represents the true rate of the received signal. Another approach discloses a system for correcting phase jitter and frequency offsets by using a phase-locked loop for tracking the average phase and frequency offsets followed by a phase jitter corrector located outside the loop. Still another approach is to use an isolated clock circuit for generating the clock signal to be encoded for transmitting signals. The isolated clock is run on an isolated supply and buffers are used to isolate paths going to the multiplexer and the encryptor.
All the above-mentioned approaches contain an efficient means for effective removal of amplitude- and phase-modulation components. The reconstruction of a noisy signal may eliminate phase-modulation components but not necessarily amplitude modulation components. Similarly, the system for correcting phase jitter and frequency offsets by using a phase-locked loop together with a jitter corrector may remove phase-modulation components but not necessarily amplitude-modulation components. The approach utilizing an isolated clock and associated circuits is cumbersome. Further the external clock does not have the advantages of the multiplexer's internal clock which are better noise performance and desired synchrony since the multiplexer power supply oscillator is usually synchronous with the internal clock. Approaches utilizing external power supplies and amplitude buffers alone do not remove phase noise.
SUMMARY OF THE INVENTION
The shortcomings of prior art devices include the lack of removal of both amplitude- and phase-modulation components from the clock signal, lack of synchronism in the output signal with the multiplexer internal clock, lack of simplicity of the main and associated circuits, required circuit modification, and notable expense. The present device avoids these shortcomings.
The present signal processor utilizes a simple design for effectively removing both amplitude- and phase-modulation components from a clock signal. The signal processor is quite useful in enhancing electromagnetic isolation of encrypting/decrypting equipment for secure telemetry. Removal of amplitude- and phase-modulation components from the clock line is necessary to securely operate an encryptor for digital data. A signal encrypted with a dirty clock-signal would be decodeable from the jitter introduced.
The device takes the unregulated clock pulses through a phase-locked loop with a low-pass filter in the feedback loop having a frequency of about one-tenth of the incoming clock frequency. Buffers on the device's output provide a proper interface with output clock application circuitry. The complete device including the buffers is powered by a regulated power source independent of external circuitry such as clock sources and destinations.
The phase-locked loop of the device follows the average frequency and the phase of the signal and, in doing so, any phase modulation on the input clock signal is reduced or masked or both. This reduction or masking of phase noise is important. In the case of an encrypted telemetry signal, the phase noise is generated in the area of the signal to be enciphered and is an undesired by-product since phase detection of this jitter can reveal significant information even though the signal itself has been enciphered. The use of a phase-locked loop as designed in the present device removes this type of data contamination.
Amplitude variations of an encrypted telemetry signal pose the same threat of revelation of information on the encrypted signal. These amplitude variations are removed by regeneration of the signal within a digital domain established by an amplifier operated off a regulated power supply which is also part of the present system.
Besides the object of this device's removing both amplitude and phase-modulation components which can reveal information from a clock signal which has already been encrypted, another object is the simplicity of the circuitry which eliminates cumbersome associated circuits such as an outboard oscillator with an external power supply to implement the same functional advantages of the present device.
Still another object is the relatively low expense of the device compared to other approaches for accomplishing the same purpose.
Other objects and novel features of the invention will become apparent from the following detailed description of the invention.
REFERENCES:
patent: 3614649 (1971-10-01), Gerig
patent: 3659046 (1972-04-01), Angeleri et al.
patent: 3908115 (1975-09-01), Waggener
patent: 3950616 (1976-04-01), Tammaru
patent: 4054838 (1977-10-01), Tretter
patent: 4085288 (1978-04-01), Viswanathan
patent: 4179657 (1979-12-01), Hobbs
patent: 4215245 (1980-07-01), Bellisio
patent: 4339823 (1982-07-01), Predina et al.
patent: 4496912 (1985-01-01), Ritter
Rieger James L.
Woodworth Paul H.
Pihulic Daniel T.
Skeer W. Thom
The United States of America as represented by the Secretary of
Townsend William C.
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