Electrical computers: arithmetic processing and calculating – Electrical digital calculating computer – Particular function performed
Patent
1998-10-23
2000-10-24
Follansbee, John A.
Electrical computers: arithmetic processing and calculating
Electrical digital calculating computer
Particular function performed
712 35, G06F 738
Patent
active
061381365
DESCRIPTION:
BRIEF SUMMARY
BACKGROUND OF THE INVENTION
The invention relates to a signal processor comprising by data buses, arithmetic and/or logic operations which processing means are spread over a plurality of parallel data processor branches.
Signal processors are specific microprocessors having a high computing speed, whose instruction sets and architectures are attuned to specific requirements in the range of digital signal processing and which are particularly used for converting complex algorithms in real time. For example, signal processors are used in the field of mobile radio according to the GSM standard where they are used in mobile radio terminals or radio base stations for converting complex signal processing algorithms. Further fields of application are, for example, audio, video, medical and automotive technology, such as DECT systems (Digital European Cordless Telephone), ISDN systems (Integrated Services Digital Network) or digital radio.
From DE-A 43 44 157, a conterpart of which is U.S. Pat. No. 5,799,201 is known a signal processor of the type defined in the opening paragraph. The signal processor described there comprises a plurality of input registers coupled to a data source by two data buses. Only a first part of the input registers is directly connected to the data buses. Data to be processed are transmitted to the second part of the input registers via the first part of the input registers. In this manner, the data transmitted to the second part of the input registers are delayed. The data applied to the input registers are processed in parallel. They are applied to multipliers whose output values (products) are further processed in parallel by means of arithmetic/logic units (ALU) and accumulator registers.
Such signal processors are suitable for the accelerated computation of autocorrelation and cross-correlation functions. Furthermore, faster digital FIR filters can be realized with such signal processors. However, other algorithms, such as, for example, algorithms for determining the Fast Fourier Transform (FFT) or LTP (Long-Term Prediction) algorithms in the field of speech processing cannot be accelerated with such signal processors, or only to a limited extent.
OBJECTS AND SUMMARY OF THE INVENTION
Therefore, it is an object of the invention to modify the signal processor of the type defined in the opening paragraph, so that enhanced flexibility of the signal processor is achieved and the number of possible applications is increased.
The object is achieved in that multiplexing means are provided which are used for coupling the arithmetic and/or logic-operation processing means of the various data processing branches to a respective part of the input registers in dependence on control signals.
The multiplexing means couple an arbitrary number of input registers, which number can be determined by the control signals, to the arithmetic and/or logic-operation processing means spread over the parallel processing branches. More particularly the data buffered in the input registers are selectively applied to the multipliers arranged in the parallel data processing branches, while the products delivered by the multipliers are further processed by further arithmetic and/or logic-operation processing means. The data source producing the data represents, for example, a memory unit; but also other forms of data sources such as, for example, registers or so-termed I/O ports may be used here. The required enhanced flexibility is established without a loss of processing power, because the allocation between input registers and the arithmetic and/or logic-operation processing means is no longer fixed, but may be predefined by control signals which, in turn, can again be easily adapted to the respective application by means of software. Based on the invention. it is possible to further process, as required, data buffered in an input register in different instruction cycles and different parallel data processing branches, more particularly, by letting various multipliers form different products which have at lea
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Bauer Harald
Lorenz Dietmar
Meyer Peter
Woudsma Roberto
Follansbee John A.
Halajian Dicran
U.S. Philips Corporation
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