Signal processing resource for selective series processing...

Electrical computers and digital processing systems: processing – Processing architecture – Microprocessor or multichip or multimodule processor having...

Reexamination Certificate

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C712S029000, C710S069000

Reexamination Certificate

active

07152151

ABSTRACT:
A multi-processor arrangement having an interprocessor communication path between each of every possible pair of processors, in addition to I/O paths to and from the arrangement, having signal processing functions configurably embedded in series with the communication paths and/or the I/O paths. Each processor is provided with a local memory which can be accessed by the local processor as well as by the other processors via the communications paths. This allows for efficient data movement from one processor's local memory to another processor's local memory, such as commonly done during signal processing corner turning operations. The configurable signal processing logic may be configured to host one or more signal processing functions to allow data to be processed prior to its deposit into local memory.

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patent: 6256724 (2001-07-01), Hocevar et al.
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DeHon, Andre, Transit Note #118 Notes on Coupling Processors with Reconfigurable Logic, Mar. 21, 1995, pp. 1-8.
Block diagram of Thales' VxG4 board, downloaded on Apr. 25, 2001 from <http://www.cetia.com/images/prod—bds—vxg4—blockdiag.jpg>.
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