Signal processing method and device

Details Signal processing method and device Signal processing method and device

2007-03-16

2009-02-17

JeanPierre, Peguy (Department: 2819)

Coded data generation or conversion

Digital code to digital code converters

Data rate conversion

C341S143000, C708S313000

Reexamination Certificate

active

07492289

ABSTRACT:
Periodically sampled digital data (e.g., digital audio data) are once stored in a work RAM and are then subjected to signal processing such as arithmetic operations using coefficients. A primary accumulator register stores results of arithmetic operations. A secondary accumulator register is specialized in handling a relatively high processing load (e.g., down-sampling) having a plurality of steps, which are distributed and appropriately assigned to a plurality of periods in response to output timings. In order to execute other processing in each period, intermediate results of arithmetic operations regarding the relatively high processing load are temporarily stored in the secondary accumulator register. The number of steps assigned to each period is appropriately changed in response to interruption of the other processing, whereas the relatively high processing load is given a first priority in comparison with the other processing.

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