Signal processing circuit with digital delay

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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307494, 307605, 328 13, 328 28, H03K 500, H03K 513, G06G 712, H03B 1900

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active

050813692

ABSTRACT:
A signal processing circuit has a differential circuit for differentiating an analog signal and a comparator circuit for converting the signal output from the differential circuit into a digital signal. The signal processing circuit is characterized by further comprising a delay circuit for delaying the converted digital signal by a predetermined period of time. In the signal processing circuit of the present invention, the analog signal is first differentiated and digitized, and then, finally, delayed by the digital delay circuit. With such an arrangement, analog filters can be dispensed with, thus enabling most of the signal processing circuit to be built into the IC circuit, and to be of more simple design.

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