Signal processing circuit comprising an attenuating unit, a...

Telecommunications – Receiver or analog modulated signal frequency converter – Frequency or phase modulation

Reexamination Certificate

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C455S249100, C455S296000

Reexamination Certificate

active

07542748

ABSTRACT:
A signal processing circuit is disclosed which comprises: an attenuating unit that attenuates a demodulated signal acquired by detecting a received signal; a detecting unit that detects a first signal indicating intensity of the demodulated signal; and an attenuation rate setting unit that sets an attenuation rate of the attenuating unit based on the first signal, wherein the attenuation rate setting unit sets the attenuation rate of the attenuating unit depending on: at least one signal of a second signal indicating a change in an envelope curve acquired based on an intermediate frequency signal of the received signal and a third signal indicating electric field intensity acquired based on the intermediate frequency signal; and the first signal.

REFERENCES:
patent: 4864637 (1989-09-01), Ishikawa et al.
patent: 5201062 (1993-04-01), Nakamura et al.
patent: 5390344 (1995-02-01), Nagata
patent: 6665526 (2003-12-01), Tsuji et al.
patent: 06-315016 (1994-11-01), None
patent: 2003-283349 (2003-10-01), None
Japan Patent Office, Office Action for application No. 2004-085123, mail date Oct. 14, 2008.

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