Signal processing circuit comprising a sigma delta analog to...

Coded data generation or conversion – Analog to or from digital conversion – Differential encoder and/or decoder

Reexamination Certificate

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C341S155000

Reexamination Certificate

active

07626526

ABSTRACT:
A signal processing circuit comprising a sigma delta analog to digital converter with a feedback loop that comprises an analog filtering circuit (14) that has a controllable time constant. In a calibration mode, a detector (18) detects a signal strength in a band (34) of frequencies at an output of the sigma delta analog to digital converter. A bandwidth control circuit (19) has an output coupled to a control input of the analog filtering circuit (14), and is arranged to control said time constant dependent on a signal strength in a band (34) of frequencies at the output of the sigma delta analog to digital converter. The band (34) of frequencies is selected so that noise shaped quantization noise density (32) of the sigma delta analog to digital converter rises with frequency.

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patent: 6414615 (2002-07-01), Cheng
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Nielsen, Jannik Hammel; et al “A Low-Power 10-Bit Continuous-Time CMOS Sigma-Delta A/D Converter” Proceedings of the International Symposium on Circuits and Systems, 2004. ISCAS '04. May 2004, vol. 1, pp. I-417-I-420.

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