Dynamic magnetic information storage or retrieval – General processing of a digital signal – Head amplifier circuit
Reexamination Certificate
1999-11-15
2003-04-15
Faber, Alan T. (Department: 2651)
Dynamic magnetic information storage or retrieval
General processing of a digital signal
Head amplifier circuit
C360S065000, C375S232000
Reexamination Certificate
active
06549352
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to a signal processing apparatus, a signal processing method therefor, an information recording apparatus and an information reproduction apparatus, and more particularly to a signal processing apparatus, a signal processing method therefor, an information recording apparatus and an information reproduction apparatus in which a partial response method is used.
2. Description of the Related Art
Recently, a recording density of magnetic disks is increasing rapidly. This is because both high-sensitive MR (magneto-resistive effect) heads and a PR4ML (a partial response class
4
and a maximum likelihood detection) method are introduced into the magnetic disk drives.
FIG. 1
shows a block diagram of a signal processing circuit of one example according to the prior art.
A signal processing circuit
1
comprises a pre-coder
2
, an NRZI (non-return-to-zero interleave) recording system
3
, a differential detection block
4
, a magnetic reproduction system
5
, an equalizer
6
, a level detection block
7
and a maximum likelihood detection block
8
.
An 8/9-conversion RLL (Run Length Limited) code is supplied to the pre-coder
2
as an input code. The input code is pre-coded by the pre-coder
2
according to 1/(1+D), where D indicates a one-bit delay.
The pre-coded code is converted into an NRZI-code by the NRZI recording system
3
and the NRZI-code is recorded on a magnetic disk with a step-shaped recording current. A recorded step-shaped signal is differentially detected by a read head in the differential detection block
4
. Thus, an impulse waveform of the recorded signal is detected by the differential detection block
4
.
The output impulse waveform from the differential detection block
4
is amplified and noise components are removed from the impulse waveform by the magnetic reproduction system
5
.
Then, an operation is performed on an output signal from the magnetic reproduction system
5
by the equalizer
6
according to (1+D), where D indicates a one-bit delay.
The level detection block
7
generates a ternary-level signal from the output signal of the equalizer. The maximum likelihood detection block
8
corrects errors in the ternary-level signal.
FIG. 1
shows a block diagram of a PR4ML method. An operation is performed on a bit sequence of the input code according to 1/(1+D)×(1+D), where D indicates a one-bit delay, according to the partial response method. The noise
25
components are also reduced by the term (1+D) of the equalizer
6
. Next, the ternary-level signal is generated from an output signal of the equalizer
6
by the level detection block
7
. Then, the maximum likelihood detection block
8
corrects errors caused by the noise components remaining in the ternary-level signal with a Viterbi algorithm.
FIG. 2
shows a transfer characteristic of the term (1+D) used in the PR4ML method. A high-frequency noise component is reduced because the transfer characteristic of (1+D) is a low-pass filter. Therefore, a signal-to-noise ratio of the output signal from the equalizer
6
is increased.
As mentioned above, the 8/9-conversion RLL code is employed as the input code in the signal processing circuit
1
shown in
FIG. 1
together with the PR4ML method.
However, a recording frequency for recording the 8/9-conversion RLL code used in this signal processing circuit
1
with the PR4ML method is higher than that of a 1/7-conversion RLL code under the condition that the same recording density is achieved by both codes. As the recording frequency increases, the distortion of a recording waveform also increases. This distortion causes a bit shift (NLTS, Non Linear Transition Shift) of reproduced data. Therefore, this causes a problem that an error rate of the reproduced data is increased.
On the other hand, a 1/7-conversion RLL code may be used in a system together with a peak detection method. Therefore, it is possible to lower the recording frequency of the system using the 1/7-conversion RLL code together with the peak detection method below that of the system using the 8/9-conversion RLL code together with the PR4ML method. However, it is very hard to employ a maximum likelihood decoding circuit because whether a signal exists in a time window or not is only detected by the system using the peak detection method.
SUMMARY OF THE INVENTION
It is a general object of the present invention to provide a signal processing apparatus and a signal processing method therefor, an information recording apparatus and an information reproduction apparatus in which the above disadvantages are eliminated.
A more specific object of the present invention is to provide a signal processing apparatus, a signal processing method therefor, an information recording apparatus and an information reproduction apparatus in which a low recording frequency, a reduced distortion of a waveform of a recording current and a reduced NLTS (Non Linear Transition Shift) are achieved and an error rate of a reproduced signal is reduced by a maximum likelihood decoding method.
The above objects of the present invention are achieved by a signal processing apparatus in which a signal is processed using a partial response method. The apparatus comprises a signal processing unit which performs an operation (1−D) on each bit of an input code, where D indicates a delay of one bit; an equalizing unit which equalizes a bit sequence processed by the signal processing unit to a Nyquist characteristic; and a maximum likelihood detection unit which detects a maximum likelihood bit sequence from the bit sequence equalized by the equalizing unit. The input code of the signal processing unit is a 1/7-conversion RLL code of input data.
According to the invention, an error rate of a signal reproduced by the signal processing apparatus can be reduced by a maximum likelihood decoding method using a partial response method.
Furthermore, according to the invention, a low recording frequency, a reduced distortion of a waveform of a recording current and a reduced NLTS are achieved by using the 1/7-conversion RLL code. This also leads to a reduction of an error rate of the reproduced signal.
REFERENCES:
patent: 5539588 (1996-07-01), Sawaguchi et al.
patent: 5737141 (1998-04-01), Hardwick et al.
patent: 6249398 (2001-06-01), Fisher et al.
patent: 4177603 (1992-06-01), None
patent: 4355268 (1992-12-01), None
Kasai Kiichiro
Uno Hiroshi
Yamasaki Nobuyoshi
Faber Alan T.
Fujitsu Limited
Greer Burns & Crain Ltd.
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