Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reexamination Certificate
1996-07-11
2004-10-19
Hjerpe, Richard (Department: 2674)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
C345S100000
Reexamination Certificate
active
06806859
ABSTRACT:
FIELD OF THE INVENTION
Our invention relates to drive circuits for LCD displays, and more particularly to a circuit for driving the signal lines of a multi-level gray-scale LCD display.
BACKGROUND OF THE INVENTION
As an example of an LCD display,
FIG. 8
shows a schematic of an active-matrix thin-film transistor (TFT) color LCD display. A TFT liquid-crystal panel
100
has multiple gate lines Y
1
, Y
2
, . . . and multiple signal lines X
1
, X
2
, . . . which cross to form a matrix, and at each intersection point there is a thin film transistor for controlling a colored pixel (pixel) at that point. Gate line drivers G
1
, G
2
, . . . Gn are connected in parallel for driving the gate lines, and signal line (source) drivers S
1
, S
2
, . . . Sm are connected in parallel for driving the signal lines. A controller
102
controls the operation of each part. An image signal processing circuit
104
executes the necessary signal processing for the signals for the image to be displayed. A gray-scale voltage generating circuit
106
generates multiple-gray-scale voltages for enabling a full-color (multiple-gray-scale display).
Image signal processing circuit
104
supplies digital image data DX representing the gray-scale display of each pixel to the m signal line drivers. For example, with 64 gray-scale values, image data DL of 6 bits is provided to them signal line drivers from image signal processing circuit
104
for each red, green and blue (R,G,B) pixel. Controller
102
supplies various control or timing signals in synch with a horizontal synchronizing pulse HS and a vertical synchronizing pulse VS to the n gate line drivers and m signal line drivers. Gray-scale voltage generating circuit
104
provides multiple-level gray scale voltages corresponding to the 64 gray scale values achievable with the panel
100
's V-T (voltage-transmissivity) characteristics.
The detailed construction of a typical liquid-crystal panel
100
is shown in
FIG. 9. A
liquid crystal material
114
is sealed or filled between lower and upper glass plates
110
and
112
. On the inner surface of plate
110
, a pixel electrode Pi,j and a corresponding thin-film transistor TFTi,j composed of a transparent conductive film are formed near each intersection of a signal line Xj (not shown) and gate line Yi (not shown). Pixel electrode Pi,j is connected to corresponding signal line Xj via transistor TFTi,j, and the gate electrode Tg which controls transistor TFTi,j is connected to corresponding gate line Yi.
The inner surface of the other plate
112
is covered with a color filter layer
115
having a pattern of red, green, and blue (RGB) filters for corresponding colored pixels, over which is a common opposing electrode
116
formed of a transparent conductive film. On the outside surfaces of glass plates
110
and
112
, corresponding lower and upper polarizer layers
118
and
120
are provided whose respective polarization axes can be made either parallel or orthogonal to each other.
As shown in
FIG. 9
, a light source for backlighting is provided beneath lower polarizer
118
and the backlit display can be viewed from above through upper polarizer
120
. Suppose the polarization axes of polarizer layers
118
and
120
are parallel to each other (e.g., both pointed into the page in FIG.
9
). Assume that unactivated liquid crystal (no electric field applied) rotates the polarization axis of the backlight entering through polarizer layer
118
by 90° so it points to the left in
FIG. 9
but activated liquid crystal (voltage applied between electrodes Pi,j and
116
) does not rotate the backlight. In such case, the backlight (colored by filter
115
) will only shine through polarizer layer
120
at those pixels where a voltage is applied between electrodes Pi,j and
116
. If instead polarizer layers
118
and
120
are orthogonal to each other, the backlight will only shine through at those pixels where no voltage is applied.
In
FIG. 9
, Ts represents the transistor's source electrode, Td its drain electrode,
124
a semiconductor layer,
126
a protective film,
128
a gate-insulating film, and
130
a black matrix separating the various RGB filters.
The circuit configuration within liquid-crystal panel
100
is shown in FIG.
10
. The liquid crystal material
114
sandwiched between each pixel electrode Pi,j and facing common electrode
116
forms a signal storage capacitor Cs. During each frame, the gate lines Y
1
, Y
2
, . . . are usually selected and driven active one line at a time in scan line order by the gate line drivers.
For example, if gate line Yi for line i is driven active, all transistors TFTi,
1
, TFTi,
2
, . . . of line i connected to gate line Yi are turned ON. Simultaneously, signal line drivers S
1
, S
2
, . . . output the analog gray-scale voltages for all the pixels of the i line, and these gray-scale voltages activate corresponding pixel electrodes Pi
1
, Pi
2
, . . . via signal lines X
1
, X
2
, . . . and “ON” transistors TFTi,
1
, TFTi,
2
, . . . .
Thereafter, gate line Yi is deactivated and gate line Yi+1 activated for the next line i+1, and the operation described above is executed for line i+1. When gate line Yi is deactivated, the transistors in line i turn OFF and the charge stored in each pixel of line i cannot escape its signal storage capacitor Cs, so the gray scale voltage level for each pixel electrode Pi
1
, Pi
2
, . . . is stored until the next time gate line Yi is selected.
Thus, a corresponding gray-scale voltage can be applied to each pixel electrode in one frame period, but to prevent degradation of the liquid-crystal molecules the polarity of the voltage applied must be alternated. In a TFT-LCD, there are two ways to apply alternating voltage to the liquid crystal material: the so-called common-fixed drive method and the common-inverting drive method.
As shown in
FIG. 11
, in the common-fixed drive method only the polarity of the voltage applied to the pixels alternates while the voltage applied to the common electrode
116
remains fixed. As shown in
FIG. 12
, in the common-inverting drive method, the polarities of both the voltage applied to the pixels and the common voltage are simultaneously alternated. That is, a positive voltage is applied to the pixel electrodes when common
116
electrode is negative, after which a negative voltage is applied to the pixel electrodes when common electrode
116
is positive.
The common-inverting drive method has the advantage of enabling a low-voltage driver to be used since the voltage amplification of the pixel electrode can be halved compared to the common-fixed process. However, it has the disadvantages that power consumption is high, because the large-capacitance common electrode
116
is driven with alternating current, and the display quality is inferior. In contrast, the common-fixed drive method has superior display quality and lower power consumption, although a low-voltage driver cannot be used. The common-fixed drive method is considered particularly suitable for large-screen TFT-LCD.
A conventional signal line driver circuit S using the common-fixed drive method is shown in FIG.
13
. The circuit configuration of the drive portion for one signal line or one channel in such a signal line driver S is shown in FIG.
14
.
In the conventional signal line driver S, an enable input signal EIO having pointing information, for example a “1”, is input from controller
102
into a shift register
140
. This EIO signal is shifted within shift register
140
in accordance with a clock signal to sequentially designate the data storage positions for each channel portion of data register
142
, enabling one line of image data DX from image data signal processing circuit
104
to be serially input into data register
142
. Next, controller
102
provides a strobe signal ST to a data latch circuit
144
to input the one line of image data DX in parallel from data register
142
to the data latch circuit
144
.
Then the image data DX in data latch
144
is input to a voltage level shifter circuit
145
Kanoh Hideki
Nakazato Yoshiaki
Takuma Michio
Brady III W. James
Hjerpe Richard
Laneau R.
Petersen Bret J.
Telecky , Jr. Frederick J.
LandOfFree
Signal line driving circuit for an LCD display does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Signal line driving circuit for an LCD display, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Signal line driving circuit for an LCD display will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3323705