Signal input cutoff detector, photo receiver and signal...

Radiant energy – Photocells; circuits and apparatus – Optical or pre-photocell system

Reexamination Certificate

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C250S2140RC

Reexamination Certificate

active

06570148

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a photo receiver and a photo receiving method, and more particularly, to a signal cutoff detector and a signal cutoff detecting method.
2. Description of the Related Art
For enhancing reliability of an optical communication system to quickly take countermeasure in case a failure occurs, demanded is improving a failure detection function of each part of the system.
For such a purpose, a photo receiver is conventionally provided with a function of detecting a signal being cut off. Structure of a conventional signal cutoff detection circuit is shown in FIG.
12
. The signal cutoff detection circuit of
FIG. 12
includes a photo detector
10
, a preamplifier
11
, an amplifier or limiter amplifier
12
with an automatic gain control (AGC) function, a band-pass filter
13
, an amplifier
14
, a limiter amplifier
15
, a peak value detection circuit
16
, a delay element
17
, a discrimination circuit
18
and a comparator
19
. A light signal applied to the photo receiver is converted into an electric signal by the photo detector
10
and then amplified into a signal of a predetermined level by the preamplifier
11
and the AGC amplifier or limiter amplifier
12
. An output of the AGC amplifier or limiter amplifier
12
is branched into two, one of which is applied to a data input terminal of the discrimination circuit
18
. The other signal is input to the band-pass filter
13
, in which a clock component contained in the data signal is extracted. After being amplified to a signal of a predetermined level by the amplifier
14
and the limiter amplifier
15
, the extracted clock signal is input to the discrimination circuit
18
, in which it is used as an identification clock of a data signal. A delay difference between a clock signal and a data signal is compensated for by the delay element
17
.
Here, a part of the output of the amplifier
14
is input to the peak value detection circuit
16
. At the peak value detection circuit
16
, a peak level of the input clock signal is detected and the comparator
19
determines whether a clock signal exists or not based on whether the detected level reaches a predetermined level. When the determination is made that no clock signal exists, it can be known that no appropriate light signal is input to the photo receiver or that some abnormality occurs in the photo receiver.
In the field of optical communication today, there are many cases where an optical relay amplifier is used as a relay and where wave-length division multiplexing (WDM) transmission is conducted for increasing a transmission capacity per optical fiber.
In such a transmission system, in a case where a failure on a transmission path, a photo transmitter and receiver or a relay eliminates a light data signal, an amplified spontaneous emission (ASE) generated at each optical relay amplifier is accumulated to reach a photo receiver. On the other hand, in wave-length division multiplexing (WDM) transmission, when a light data signal of a part of wave-length channels is lost due to some failure or other, processing of superposing a dummy signal (continuous wave (CW) light) on a wave-length whose signal is lost called “keep alive” is conducted in some cases in order to balance power between the respective wave-length channels. In such cases, while wave-length light itself exists, no signal exists, so that such cases should be detected being abnormal. At the time of a noise caused by ASE or the time of keep alive, a photo receiver might be subjected to a high-level noise, which makes it difficult for conventional methods to detect signal cutoff.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a signal input cutoff detector having a function of reliably detecting signal cutoff in a wave-length division multiplexing (WDM) transmission system and a transmission system including an optical relay amplifier.
According to the first aspect of the invention, a signal input cutoff detector comprises
a signal cutoff detector which detects a level of a data signal converted from a light input signal into an electric signal and when the level is below a predetermined value, generates a first alarm signal; and
an out-of-synchronization detector which monitors a VCO control signal which controls a voltage controlled oscillator (VCO) to have a frequency and a phase synchronized with the data signal and when a level of the control signal exceeds a predetermined value, generates a second alarm signal.
In the preferred construction, the signal input cutoff detector further comprises an alarm processor which generates a third alarm signal according to generation conditions of the first alarm signal and second alarm signal.
In another preferred construction, the signal cutoff detector includes
an autocorrelation detector which calculates an autocorrelation of the data signal to output an autocorrelation signal, and
a first comparator which compares the autocorrelation signal with at least one predetermined reference voltage and when the autocorrelation signal is larger, outputs the first alarm signal.
In another preferred construction, the signal input cutoff detector further comprises an alarm processor which generates a third alarm signal according to generation conditions of the first alarm signal and second alarm signal, wherein
the signal cutoff detector including an autocorrelation detector which calculates an autocorrelation of the data signal to output an autocorrelation signal, and a first comparator which compares the autocorrelation signal with at least one predetermined reference voltage and when the autocorrelation signal is larger, outputs the first alarm signal.
In another preferred construction, the signal cutoff detector including an autocorrelation detector which calculates an autocorrelation of the data signal to output an autocorrelation signal, and a first comparator which compares the autocorrelation signal with at least one predetermined reference voltage and when the autocorrelation signal is larger, outputs the first alarm signal, and
the autocorrelation detector including a delay element which delays the data signal by a predetermined delay time to output a delayed data signal, an exclusive OR circuit which calculates an exclusive OR of the data signal and the delayed data signal to output an exclusive OR signal, and a first integrator which calculates a mean value of the exclusive OR signal.
In another preferred construction, the signal input cutoff detector further comprises an alarm processor which generates a third alarm signal according to generation conditions of the first alarm signal and second alarm signal, wherein
the signal cutoff detector including an autocorrelation detector which calculates an autocorrelation of the data signal to output an autocorrelation signal, and a first comparator which compares the autocorrelation signal with at least one predetermined reference voltage and when the autocorrelation signal is larger, outputs the first alarm signal, and
the autocorrelation detector including a delay element which delays the data signal by a predetermined delay time to output a delayed data signal, an exclusive OR circuit which calculates an exclusive OR of the data signal and the delayed data signal to output an exclusive OR signal, and a first integrator which calculates a mean value of the exclusive OR signal.
In another preferred construction, the signal cutoff detector including an autocorrelation detector which calculates an autocorrelation of the data signal to output an autocorrelation signal, and a first comparator which compares the autocorrelation signal with at least one predetermined reference voltage and when the autocorrelation signal is larger, outputs the first alarm signal, and
the autocorrelation detector including a delay element which delays the data signal by a predetermined delay time to output a delayed data signal, an exclusive OR circuit which calculates an exclusive OR of the data signal and the delayed data signal to ou

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