Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Current driver
Reexamination Certificate
1999-11-23
2001-10-09
Wells, Kenneth B. (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Signal converting, shaping, or generating
Current driver
C327S170000, C327S437000, C326S087000
Reexamination Certificate
active
06300806
ABSTRACT:
BACKGROUND OF THE INVENTION
This invention relates to a signal function generator.
Function generators often generate interfering harmonics that are often associated with the steep signal edges of the generated signal waveform. Harmonics caused by large current changes are particularly troublesome in monolithic integrated circuits if in the presence of a relatively large capacitive load, the associated voltage level is changed within a relatively short time interval. This occurs in digital circuits which change a large number of states simultaneously and synchronously with a common clock. The associated load currents add up on the clock and supply lines and produce electromagnetic interference via these lines. If external loads are switched via output stages, the load currents also appear on the output lines of these output stages resulting in additional electromagnetic interference. The magnitude of the interference is dependent on the output stage, the load, and the kind and length of the interconnecting lines. The contribution of the lines is largely determined by the geometry and is subject to only small variations. In contrast, the contributions of the output stage and the load depend on the respective circuit technology, the manufacturing tolerance, the temperature, the number and size of the transistors, and other variables, and may therefore vary widely.
In CMOS circuits, the load includes the sum of the input capacitances of the transistor gates to be switched. Typical sum values for the input capacitances to be taken into account range between about 5 pF and several hundred pF. Even though it is not generally necessary to cover the entire range of values, it is readily apparent that conventional complementary driver circuits are not suitable for use as function generators, because in conjunction with the connected load capacitances they cause an approximately exponential charging or discharge process. A disadvantage of the resulting switching edge is that during the transition, the waveform has widely differing slopes. At the beginning, the slope is very steep, so that many harmonics are produced; at the end, the waveform rises very slowly, so that the final level is reached only very late. Eliminating both disadvantages simultaneously is not possible with prior-art complementary circuits. To hold the various tolerances for the maximum permissible transition time of the switching edge, the complementary driver circuit is designed for the worst-case tolerance combination, so that the edges at the beginning are much too steep and, thus, produce unwanted harmonics.
There are also other cases where the shape of the switching edges has to be considered, for example if on rising and falling edges of digital signals, the respective switching thresholds are to be reached at particular points of time. This is important, for example, if overlapping or nonoverlapping is required. In the case of other digital signals where only one switching edge is important, for example, only the shape and duration of this edge is of interest. The shape and duration of the second edge is insignificant for interference considerations if it is less steep than the first edge. On the other hand, there are signals whose edges are to be as trapezoidal or symmetric as possible.
The problem of radio-frequency electromagnetic emissions from signal, supply, and clock lines becomes more critical with the increasing complexity of monolithic integrated circuits, the increasing number of transistors, and increasing processing speed. Specifications relating to interference to other equipment or to internal interference are frequently found under the abbreviation EMC (electromagnetic compatibility). Internal interference may occur, for example, if in addition to digital subcircuits, analog subcircuits are present in the respective circuit and signal corruption is caused therein by spurious digital signals being superimposed on the analog signals.
Therefore, there is a need for a function generator that controls the generated waveform in the edge regions of the waveform to reduce the generation of signal noise such as harmonic frequencies.
SUMMARY OF THE INVENTION
An object of the invention to provide a monolithically integrable function generator for internal or external signals with which the signal transition and the current change associated therewith can be predetermined.
Briefly, according to the present invention, a function generator comprises a switching stage for forming a defined signal waveform. The switching stage includes switching transistors that are turned on in a predetermined sequence of undelayed and delayed clock signals, with an output node summing the output currents of said switching transistors. The function generator also includes a delay device that generates the undelayed and delayed clock signals from an applied clock signal. The delays of the delayed clock signals define predetermined instants within at least one period of the applied clock signal.
The switching edge is divided into different time ranges whose respective edge steepnesses are adjustable independently of each other. By point-mirroring the signal waveform about a medium value of the signal edge, frequencies at twice, four times, six times, etc. the frequency of the fundamental signal frequency are reduced. Due to the sinusoidal shape of the switching edges, electromagnetic emissions are reduced because of the reduced amplitude of the harmonics. The electromagnetic emission reduction applies both to pure clock signals and to other digital signals, including control, data, or supply lines (hereinafter collectively referred to as “signal”).
A fine-step adjustment of the steepness without the need for a major amount of integrated circuit area is achieved by turning weighted switching transistors on and/or off if the weighted transistors are switchable in groups. The current yield is weighted via the emitter area in the case of bipolar transistors or via the width-to-length (W/L) ratio of the respective gate region in the case of CMOS transistors. Weight grading via powers of two permits a digital selection of the group members or their control by means of binary numbers. Setting the weighting via like transistors connected in parallel is more accurate but requires a greater amount of area.
Increased flexibility of the function generator is achieved if the frequency of the clock signal is not fixed, but varies or is adjustable within limits. This is accomplished by a first control circuit that controls the delays of the delayed clock signals. The control is provided with respect to the respective reference phase and frequency of the clock signal. To provide the individual delays, the control circuit uses delay chains whose total or partial delay is locked to the respective clock signal by a phase-locked loop. A detailed example of this is described in EP 0 116 669 A assigned to the assignee of the present invention.
The embodiment that can be coupled to an arbitrary clock is advantageous if the clock is not present in the respective circuit as a fixed system clock, but is variable or not yet known. This embodiment is also suitable for use as a general module of a program library, because in the circuit design, no frequency matching is necessary within wide limits.
A further improvement in the flexibility of the function generator is achieved with a second control loop to make the current yield of the switching transistors independent of the respective load. The second control loop is preferably independent of the first control loop. The change in current yield is effected simply by switching the transistors on or off or by a different group selection. The necessary control is provided by a second control circuit, in which a voltage comparator compares an instantaneous voltage value (=actual value) with a desired value during the switching edge to form a control signal, which may also be a selection signal. With the selection signal, the weighting of the connected switching transistors is increased or decreased joi
Bidenbach Reiner
Theus Ulrich
Micronas GmbH
Samuels , Gauthier & Stevens, LLP
Wells Kenneth B.
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