Signal detection circuit for optical disk

Dynamic information storage or retrieval – Binary pulse train information signal – Binary signal level detecting using a reference signal

Reexamination Certificate

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Details

C369S059180, C369S124150

Reexamination Certificate

active

06765855

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to a signal detection circuit for an optical disk which detects and reproduces a signal recorded on the optical disk such as a CD (compact disk) or a CD-ROM. More particularly, this invention relates to a signal detection circuit for an optical disk which properly carries out slice-level control of a signal at the time of converting an analog signal read through a pick-up into a digital signal.
BACKGROUND OF THE INVENTION
Conventionally, for reproducing information recorded on an optical disk, an analog HF signal read from the optical disk has been converted into a digital HF signal based on a predetermined slice level. In many cases, information is recorded onto an optical disk as the information of an EFM (Eight-to-Fourteen Modulation) signal of which the DC component of the signal becomes zero. Therefore, at the time of the analog/digital conversion, the slice level is controlled to become a central voltage level of the analog HF signal.
FIG. 8
is a block diagram that shows a construction of a conventional signal detection circuit for an optical disk. In
FIG. 8
, an analog HF signal S
101
read from an optical disk by a pick-up (not shown) is input to a terminal T
101
. A capacitor C
101
cuts a DC component of the input analog HF signal S
101
, and outputs an analog HF signal S
102
, from which the DC component has been cut out. ADC signal of a slice-level control voltage V
TLC
that is input through a resistor R
102
, which will be explained later, is superimposed on the analog HF signal S
102
. The analog HF signal S
102
is then input to a minus (−) terminal of a comparator
101
as an analog HF signal S
102
a
which has been superimposed the DC signal of the slice-level control voltage V
TLC
.
A reference voltage V
ref
is input to a plus (+) terminal of the comparator
101
. The comparator
101
compares the analog HF signal S
102
a
with the reference voltage V
ref
, and outputs a result of the comparison as a digital HF signal S
103
. In other words, the comparator
101
executes an analog/digital conversion for converting the analog HF signal S
102
a
into the digital HF signal S
103
.
The digital HF signal S
103
output from the comparator
101
is input to a digital signal processing circuit
103
. The digital signal processing circuit
103
processes the input digital HF signal S
103
to reproduce a voice signal and a video signal, and outputs these signals.
Further, the digital HF signal S
103
output from the comparator
101
is input to a charge-pump circuit
104
. The charge-pump circuit
104
controls charge/discharge volumes to be applied to a capacitor C
102
so that a plus (+) side electrode voltage of the capacitor C
102
becomes a proper slice-level control voltage V
TLC
corresponding to an average DC level of the input digital HF signal S
103
. This slice-level control voltage V
TLC
is input to the minus (−) terminal of the comparator
101
through a resistor R
102
.
In other words, the reference voltage V
ref
is constant when the comparator
101
executes the analog/digital conversion. Therefore, based on the control of the charge/discharge volumes of the capacitor C
102
, the charge-pump circuit
104
feedback-controls the slice-level control voltage V
TLC
at a connection point P
101
that is superimposed on the analog HF signal S
102
. Further, the charge-pump circuit
104
controls the central voltage level of the analog HF signal S
102
so that the voltage relatively becomes the reference voltage V
ref
at the time of the analog/digital conversion. In this case, the digital HF signals S
103
output from the comparator
101
include high-level signals and low-level signals that are generated uniformly. Therefore, the charge-pump circuit
104
detects an average DC level of the input digital HF signals S
103
to control the charge/discharge volumes of the capacitor C
102
.
The digital HF signal S
103
output from the comparator
101
is input to a dropout-signal detection circuit
102
. The dropout-signal detection circuit
102
detects an envelope SE of the digital HF signal S
103
by using, for example, a peak-holding circuit. When the voltage level of this envelope has become a predetermined value or lower, the dropout-signal detection circuit
102
outputs a signal S
104
that shows the occurrence of a dropout signal (dropout) to a charge-pump circuit
104
. This dropout signal is generated by the scratch of an optical disk or by the oscillation of the optical disk at the time of reading.
When the signal S
104
that shows the occurrence of a dropout signal has been input to the charge-pump circuit
104
, the charge-pump circuit
104
sets the output to the OFF state, that is, a high-impedance state, and maintains the slice-level control voltage V
TLC
at the connection point P
101
.
FIG. 9
is a timing chart that shows a slice-level operation when a dropout signal has occurred in the conventional signal detection circuit for an optical disk. In
FIG. 9
, when a dropout E
101
has occurred in an input analog HF signal S
102
, the voltage of an envelope SE of a digital HF signal S
103
becomes a predetermined value or lower. A dropout-signal detection circuit
102
detects a dropout signal, and outputs a signal S
104
to a charge-pump circuit
104
. This signal S
104
is kept being output until when the voltage level of the envelope SE has exceeded a predetermined value. During a period while this signal S
104
is in the ON state, the charge-pump circuit
104
keeps the output in the OFF state, and holds the slice-level control voltage V
TLC
at a point tbb when the dropout signal has been detected.
With this arrangement, the slice-level control voltage V
TLC
is forcibly set to a high level. Therefore, even when a dropout signal has occurred and the analog HF signal S
102
has come to contain only a noise component, it is possible to prevent this erroneous digital HF signal S
103
from being output to the digital signal processing circuit
103
.
The above-described conventional signal detection circuit for an optical disk, however, has the following drawbacks. The charge-pump circuit
104
operates as if there has occurred no dropout signal during the period from a time taa when the analog HF signal S
102
has actually become a dropout signal to the time tbb when the dropout-signal detection circuit
102
has detected the dropout signal. During this period, the charge-pump circuit
104
charges the capacitor C
102
, and controls the slice-level control voltage V
TLC
from increasing, based on a time constant determined by the capacitor C
102
and the resistor R
102
. Therefore, the slice-level control voltage V
TLC
varies. As a result, the signal detection circuit detects unnecessary signals such as noise, and outputs an erroneous digital HF signal S
103
to the digital signal processing circuit
103
.
Further, a DC signal based on the slice-level control voltage V
TLC
increases or decreases depending on the time constant that is determined by the capacitor C
102
and the resistor R
102
. Therefore, when there is no occurrence of a dropout signal, it is possible to obtain a more stable digital HF signal by setting the time constant to a larger value. However, when the time constant is set to a larger value, it takes a long time for the slice-level control voltage V
TLC
to recover to the normal level after there has been no dropout signal. Accordingly, when the time constant determined by the capacitor C
102
and the resistor R
102
is set to a small value, a variation occurs in the slice-level control voltage V
TLC
that is held after the dropout signal has been detected. In this case, there is also a problem that a wrong digital HF signal S
103
is output to the digital signal processing circuit
103
.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a signal detection circuit for an optical disk which can stably supply a slice-level control voltage V
TLC
when a dropout signal has occurred, and when a dropout signal has not occurred

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