Signal connection system for semiconductor chip

Details Signal connection system for semiconductor chip Signal connection system for semiconductor chip

1984-03-19

1986-06-24

Pellinen, A. D.

Electricity: electrical systems and devices

Miscellaneous

357 82, 361385, 361408, H01R 900

Patent

active

045970297

ABSTRACT:
A semiconductor chip having a two-dimensional array of contacts on an exposed face thereof is mounted in a semiconductor chip module. A mechanism for delivering electricity spans the exposed face of the chip to which it is connected and includes interstitial gaps. A conductor board has a surface proximate the electricity delivering mechanism opposite from the chip. The surface of the board has a two-dimensional array of contacts which correspond to at least some of the contacts on the chip. A biasing mechanism extends from the electricity delivering mechanism toward the exposed face of the semiconductor chip and toward the conductor board, and corresponds to the array of contacts on the chip and board. Signal leads pass through the interstitial gaps and have end portions which extend transversely over the biasing means. The end portions of the signal leads are biased against the contacts of the chips and board by the biasing mechanism.

REFERENCES:
patent: 3312870 (1967-04-01), Rhoades
patent: 3893233 (1975-07-01), Glover
patent: 4245273 (1981-01-01), Feinberg et al.
patent: 4322778 (1982-03-01), Barbour et al.
patent: 4328531 (1982-05-01), Nagashima et al.
Ho et al, "Multiple LSI Silicon Chip Modules With Power Buses Composed of Laminated Silicon Sheets With Metallized Upper and Lower Surfaces" IBM Technical Disclosure Bulletin, vol. 22, No. 8A, 1/80 pp. 3410-3411.

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