Signal compressing circuit

Electrical audio signal processing systems and devices – Including amplitude or volume control – Automatic

Utility Patent

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Details

C381S106000, C333S014000

Utility Patent

active

06169808

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a signal compressing circuit, specifically, a signal compressing circuit which is designed to expand the intensity range of input signals having a stable attenuation property.
2. Discussion of Related Art
A signal compressing circuit is a device for amplifying input signals, transferred from communication equipment that directly transmits voice signals, to produce an appropriate range of signal amplitudes.
The signal compressing circuit is generally not a linear amplifier but a non-linear amplifier that amplifies input signals according to a logarithmic scale. Since a voice transmission is limited by the signal amplitude and noise characteristic of transmission signals, a non-linear amplifier is needed to amplify input signals using gains differing according to the volume level of the signal.
Such a non-linear amplifier increases the gain at very low volume signals but reduces the gain at very high volumes so that weak signal components will not be lost in background and strong signals will not overload the system.
FIG. 1
is a block diagram of a conventional signal compressing circuit.
As shown in
FIG. 1
, an input signal IN is fed into a Variable gain stage
10
through resistance R
1
and into a rectifying circuit
20
through resistance R
2
.
The rectifying circuit
20
generates rectified current and voltage, I
RECT
and V
RECT
, in proportion to input signal IN. The rectified current I
RECT
is supplied to the variable gain stage
10
and the rectified voltage V
RECT
is applied to an automatic level controlling circuit
30
.
The automatic level controlling circuit
30
generates a control current I
ALC
in proportion to rectified voltage V
RECT
. Comparing the rectified voltage V
RECT
to a reference voltage V
ALC
, the automatic level controlling circuit
30
generates a controlling current I
ALC
that is proportional to the difference between the rectified voltage V
RECT
and a reference voltage V
ALC
. The control current I
ALC
is used to control the level of the rectified current I
RECT
transferred to the Variable gain stage
10
.
The Variable gain stage
10
receives an input signal IN and a total current I
T
, which is the sum of the rectified current I
RECT
and controlling current I
ALC
. The gain of the Variable gain stage
10
is actually dependent on the level of the total current I
T
.
FIG. 2
is a block diagram of a conventional automatic level controlling circuit as described above.
As shown in
FIG. 2
, the automatic level controlling circuit
30
comprises a comparator
31
, for comparing the rectified voltage V
RECT
to a predetermined reference voltage V
ALC
, and a current mirror
32
for converting the output voltage of the comparator
31
into current.
Comparator
31
does not generate an output voltage when the rectified voltage V
RECT
is lower than the reference voltage V
ALC
, whereas it produces the output voltage when the former is higher than the latter.
The current mirror
32
generates the control current I
ALC
, whose level varies according to the output voltage of comparator
31
, controlling the gain of the above-described Variable gain stage
10
. The gain of the Variable gain stage
10
is determined by the controlling current I
ALC
, which needs to be high enough to produce low output even with high volume level of the input signal.
The automatic level controlling circuit of a conventional signal compressing circuit uses only one reference voltage to limit the gain. Thus the range of an input signal is so limited in producing output signals without distortion that effective attenuation of distortion cannot be attained with very high volume level inputs.
Also, since the range of supply voltage limits the maximum value of an output, distortion may unavoidably occurs beyond the range of the supply voltage when the level of an output, whose gain has been attenuated, exceeds the supply voltage.
To overcome this problem, the reference voltage of the automatic level controlling circuit might be greatly reduced, but this will limit the range of inputs having an optimized total harmonic distortion property, and deteriorate the signal compressing circuit's performance.
SUMMARY OF THE INVENTION
Accordingly, the present invention is directed to a signal compressing circuit that substantially obviates one or more of the problems due to limitations and disadvantages of the related art.
The object of the present invention are to solve the problem described above in creating a signal compressing circuit. This object is accomplished by expanding the range of inputs having an optimized, total harmonic distortion property.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be apparent from the description, or may be learned by practice of the invention. The object and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
To achieve these and other advantages, and in accordance with the purpose of the present invention, as embodied and broadly described, a signal compressing circuit has: a detector for detecting an input signal, and generating a first detected signal in current and a second detected signal in voltage, the first and second detected signals being proportional to the input signal; and a variable gain stage for amplifying the input signal with the controlling signal and the gain value proportional to the first detected signal.
The automatic level controlling circuit includes: a first comparator for comparing the input signal to a first reference voltage, and generating a signal proportional to the difference between them; a second comparator for comparing the input signal to a second reference voltage, having a higher level than the first reference voltage, and generating a signal proportional to the difference between them; and a current mirror for generating a controlling current in proportion to the level of the output signal or the first and second comparators.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory, and are intended to provide further explanation of the invention as claimed.
It is understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the invention as claimed.


REFERENCES:
patent: 5432389 (1995-07-01), Bader et al.

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