Signal compensation circuit and demodulating circuit with...

Pulse or digital communications – Receivers – Automatic baseline or threshold adjustment

Reexamination Certificate

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Details

C375S318000, C375S319000, C375S324000, C375S293000, C455S296000, C327S058000, C327S069000

Reexamination Certificate

active

07035349

ABSTRACT:
A signal compensation circuit compensates for direct-current offset of an input signal by amplifying the input signal with an amplifier having a variable direct-current offset. A low-speed negative feedback loop charges and discharges a capacitor in an integrating circuit according to the direct-current component of the amplified signal. A high-speed negative feedback loop charges and discharges the same capacitor at a faster rate when the amplified signal goes outside an allowable amplitude range. The capacitor potential is used to control the direct-current offset of the amplifier. The allowable amplitude range is adjusted according to the amplitude of the amplified signal. High-speed compensation can thus be combined with a tolerance for runs of identical code levels in the input signal.

REFERENCES:
patent: 4272845 (1981-06-01), Fiumani
patent: 4535294 (1985-08-01), Ericksen et al.
patent: 4571547 (1986-02-01), Day
patent: 5369470 (1994-11-01), Hansen
patent: 5412692 (1995-05-01), Uchida
patent: 6104238 (2000-08-01), Mattisson et al.
patent: 6668162 (2003-12-01), Murtojarvi

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