Signal change detection circuit

Details Signal change detection circuit Signal change detection circuit

1998-07-30

2000-06-27

Callahan, Timothy P.

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Particular stable state circuit

327199, 327291, H03K 3355

Patent

active

060811447

ABSTRACT:
An input signal SIN is input to a reset input terminal R of a flip-flop RSFF1 and, at the same time, input to a gate of a pMOS transistor MP1 constituting a transfer control circuit DCNTL1, a signal Bd obtained by delaying an inverted output signal B of the flip-flop RSFF1 at a delay circuit DLY1 is input to the data input terminal of the transfer control circuit DCNTL1, and the output signal of the transfer control circuit DCNTL1 is input to a set input terminal S of the flip-flop RSFF1 via two stages of inverters connected in series, therefore, a signal change detection circuit capable of generating a stable pulse according to the level change of the input signal without depending upon the input clock signal and capable of generating the pulse at high speed can be realized.

REFERENCES:
patent: 4583008 (1986-04-01), Grugett
patent: 5306958 (1994-04-01), Reddy et al.
patent: 5306963 (1994-04-01), Leak et al.
patent: 5357204 (1994-10-01), Knoll
patent: 5606269 (1997-02-01), Pontius et al.
patent: 5642068 (1997-06-01), Wojcicki et al.

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