Electricity: electrical systems and devices – Housing or mounting assemblies with diverse electrical... – For electronic systems and devices
Reexamination Certificate
2000-05-15
2002-02-26
Gaffin, Jeffrey (Department: 2841)
Electricity: electrical systems and devices
Housing or mounting assemblies with diverse electrical...
For electronic systems and devices
C361S795000, C361S764000, C174S255000, C257S723000, C257S703000
Reexamination Certificate
active
06351391
ABSTRACT:
BACKGROUND INFORMATION
1. Field of the Invention
This invention relates generally to the termination of signal busses in printed circuit board structures mounting ASIC chip assemblies and, more particularly, to terminating signal busses in printed circuit board structures on which ASIC chip assemblies are mounted, using individual planar signal terminating devices configured for each ASIC chip assembly.
2. Background Information
In high speed digital designs utilizing an ASIC chip assembly in a printed circuit board, it is often necessary to terminate logic signal buses with resistors to maintain signal integrity. As bus widths and ASIC I/O density increases, the quantity of resistors needed to terminate logic busses increases significantly. Because of the limited amounts of area available on printed circuit boards, it is often not possible to place the required number of discrete resistors needed for bus termination around an ASIC chip assembly that is mounted to the printed circuit board. This becomes quite significant when it is necessary for the resistors which terminate the high speed digital signals to be physically as close to the ASIC chip assembly driver pin as possible.
One prior attempt to resolve this problem is with use of what is known as embedded planar resistor technology, or buried resistors, or BR. With this solution, core laminates with a layer of embedded planar resistive material are used to fabricate the printed circuit board. The resistors are formed through a subtractive etch process in these planar resistive layers. The buried resistors are located in the printed circuit board on the opposite face from and directly beneath the ASIC chip assemblies which are mounted on a face of the printed circuit board. This solves the problem of having terminating resistors as physically close or adjacent the ASIC chip assembly pin driver as possible. However, this planar resistor technology using the layer of resistive material is applied to the entire under surface of a printed circuit board, wherein only a small portion thereof is actually needed to form the terminating resistors, adds substantially to the cost of the circuit board while under utilizing the entire buried resistor structure.
SUMMARY OF THE INVENTION
According to the present invention, a printed circuit board structure is provided where there is a circuitized dielectric substrate having a plurality of signal traces thereon. The circuitized substrate has first and second opposite faces. An ASIC chip assembly is mounted on the first face and connected to the surface by solder connections. Preferably, the ASIC chip assembly is mounted on the substrate as an IC chip mounted on a chip carrier with the chip carrier being mounted to the circuit board by solder connections, preferably in the form of a ball grid array.
In one embodiment, a discrete signal termination device is provided which is disposed on the second face of the circuitized substrate directly opposite the ASIC chip assembly. In another embodiment, a discrete signal termination device is disposed between the ASIC chip assembly and the printed circuit board.
The signal termination device includes a plurality of planar resistors embedded in a dielectric material with the resistors being electrically connected to the signal lines on the circuitized substrate, preferably by solder connections, again in the form of a ball grid array.
In yet another embodiment, the signal termination device is formed as a part of the ASIC chip assembly by being incorporated in the chip carrier adjacent where the chip carrier is mounted to the circuitized substrate.
In all cases, the signal termination device need not be formed as a part of the circuit board but can be formed in discrete individual segments for attachment to either the circuit board or formed as part of the chip carrier, thus utilizing the entire structure of the termination device to form resistors.
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IBM Technical Disclosure Bulletin, vol. 20, No. 9, Feb., 1978, “Internal Capacitors and Resistors for Multilayer Ceramic Modules”, pp 3436-3437, Lussow.
IBM Technical Disclosure Bulletin, vol. 25, No. 2, Jul., 1982, “Integrated, Low Inductance, Small Area Capacitors for VLSI Semiconductor Packages”, pp 883-888 Bajorek et al.
Beliveau Clint A.
Doeling Wallace D.
Bui Hung
Driggs Lucas Brubaker & Hoog Co., LPA
Gaffin Jeffrey
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