Amplifiers – With semiconductor amplifying device – Including plural amplifier channels
Reexamination Certificate
2001-11-15
2002-11-19
Mottola, Steven J. (Department: 2817)
Amplifiers
With semiconductor amplifying device
Including plural amplifier channels
C330S302000, C330S307000
Reexamination Certificate
active
06483385
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a signal amplification circuit used in a portable communications device, and more particularly, to a signal amplification circuit whose areas of the top and bottom surfaces are not equal.
2. Description of the Prior Art
Portable communications devices, such as cellular phones, are increasingly popular as they are light weight and do not need a fixed wire for operation. Typically, these devices are used to transmit and receive voice signals. However, as a frequency and power of voice signals is relatively low, the signals must be modulated with much higher frequency carriers to transmit over very long distances. In general, after portable communications devices receive high frequency signals, a series of signal processing steps are required, and the signals must also be amplified, so that users can hear the voice data clearly. Because portable communications devices use wireless high frequency signals as media, the received signals often experience interference in the form of noise. Therefore, each level of amplification circuits in the portable communications devices for amplifying signals must be designed carefully. Impedance matching between each level of amplification circuits must be considered in order to avoid noise propagating and affecting signal amplification. When matching impedance, frequency characteristics of signals are considered to meet different frequency echoes of each level amplification circuits.
Capacitors are commonly used when performing impedance matching. Please refer to FIG.
1
.
FIG. 1
is a diagram of a structure of a prior art capacitor
10
. The capacitor
10
is made of two identically shaped surfaces, a top surface
12
and a bottom surface
16
, which are positioned on opposite sides of a dielectric layer
14
. The top surface
12
and the bottom surface
16
are thin layer conductors, which attach at both sides of the dielectric layer
14
to form the capacitor
10
.
Please refer to FIG.
2
.
FIG. 2
is a diagram of the capacitor
10
used in a prior art signal amplification circuit
20
to match impedance. The signal amplification circuit
20
is made of an input circuit
22
, a pre-amplification circuit
24
, the capacitor
10
for matching impedance, a bias voltage circuit
28
, four amplification units
30
, and an output circuit
32
. The input circuit
22
is electrically connected to the pre-amplification circuit
24
, and an output port of the pre-amplification circuit
24
is electrically connected to the bottom surface
16
of the capacitor
10
(see FIG.
1
). The four amplification units
30
and the bias voltage circuit
28
are electrically connected to the top surface
12
of the capacitor (see FIG.
1
). Finally, the four amplification units
30
are electrically connected to the output circuit
32
.
Operation of the signal amplification circuit
20
is as follows. First, signals are inputted to the pre-amplification circuit
24
from the input circuit
22
and undergo a first amplification in the pre-amplification circuit
24
. Next, the signals are transmitted to the bottom surface
16
of the capacitor
10
for impedance matching, passing through the dielectric layer
14
coupled with the top surface
12
of the capacitor
10
. After passing through, the signals are distributed to the four amplification units
30
from the top surface
12
to undergo a second signal amplification. After the two signal amplification phases, the signal is outputted to the output circuit
32
to complete the signal amplification function of the signal amplification circuit
20
. In the signal amplification circuit
20
, the top surface
12
of the capacitor
10
is not only electrically connected to each amplification unit
30
, but is also electrically connected to the bias voltage circuit
28
. This provides a path of electrical connection so that the bias voltage circuit
28
can provide the power of the bias voltage to each of the amplification units
30
through the top surface
12
of the capacitor
10
.
When designing the matching impedance in the prior art, it is often hoped that the capacitance value of the capacitor
10
can change with the need of circuit design. If the capacitance value of the capacitor
10
needs to be changed, the shapes and the areas of the top and bottom surfaces
12
,
16
of the capacitor
10
are also changed. This is because the capacitance value of the capacitor
10
and the areas of the top and bottom surfaces
12
,
16
of the capacitor
10
are linearly directly proportional. Therefore, in the prior art design, reducing the capacitance value of the capacitor
10
because of the need of impedance matching is usually accomplished by reducing the areas of the top and bottom surfaces
12
,
16
of the capacitor
10
. However, by reducing the areas of the top and bottom surfaces
12
,
16
of the capacitor
10
, the electrically connecting path provided to each amplification unit
30
by the bias voltage circuit
28
is reduced. Because each amplification unit
30
in the signal amplification circuit
20
is used for power amplification, the need to bias the voltage power is high. The high power passes through the reduced top surface
12
, burning the top surface
12
of the capacitor
10
, and the capacitor
10
loses efficacy. To avoid this situation, the top and bottom surfaces
12
,
16
of the capacitor
10
are limited to a fixed range. With this constraint, the flexibility of changing the capacitance value of the capacitor
10
reduces, and therefore the difficulty of matching the impedance increases.
SUMMARY OF INVENTION
It is therefore a primary objective of the claimed invention to provide a signal amplification circuit whose areas of the top and bottom surfaces are not equal to increase the flexibility of designing impedance matching.
In a preferred embodiment, the claimed invention provides a signal amplification circuit used in a portable communications. The signal amplification circuit includes an input circuit for supplying input signals, an output circuit for outputting amplified signals, and a capacitor. The capacitor includes a top surface and a plurality of bottom surfaces, with a total area of the bottom surfaces being less than a total area of the top surface. The bottom surfaces are electrically connected to the input circuit. The signal amplification circuit further includes a plurality of amplification units electrically connected between the top surface and the output circuit and a bias voltage circuit electrically connected to the top surface for supplying a direct current bias voltage to the amplification units. When an input signal passes into the bottom surfaces of the capacitor through the input circuit, the input signal is coupled with the top surface of the capacitor and is passed on to the output circuit through the plurality of amplification units to generate an amplified output signal.
It is an advantage of the claimed invention that the signal amplification circuit increases the flexibility of designing impedance matching.
These and other objectives and advantages of the present invention will no doubt become obvious to those of ordinary skill in the art after having read the following detailed description of the preferred embodiment that is illustrated in the various figures and drawings.
REFERENCES:
patent: 5111157 (1992-05-01), Komiak
patent: 6355970 (2002-03-01), Fujii
Gatax Technology Co., Ltd
Hsu Winston
Mottola Steven J.
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