Sigma-delta modulator with reduced switching rate for use in...

Details Sigma-delta modulator with reduced switching rate for use in... Sigma-delta modulator with reduced switching rate for use in...

2005-08-02

2005-08-02

Jeanglaude, Jean Bruner (Department: 2819)

Coded data generation or conversion

Analog to or from digital conversion

Differential encoder and/or decoder

C341S155000

Reexamination Certificate

active

06924757

ABSTRACT:
A sigma delta modulator includes a modulator module that includes a quantizer with variable hysteresis, which receives an input signal to perform necessary modulation operations. A non-linear mapping module receives a signal associated with said input signal and tabulates the necessary hysteresis control information so as to reduce the transition rate of the modulator module.

REFERENCES:
patent: 5392040 (1995-02-01), Hayashi
patent: 5420892 (1995-05-01), Okamoto
patent: 5727038 (1998-03-01), May et al.
patent: 5974089 (1999-10-01), Tripathi et al.
patent: 6420987 (2002-07-01), Schoner et al.
patent: 0759384 (1997-02-01), None
“Flash ADC for Variable Hysteresis Scheme, with Miniminal # of Comparators,” Gaalaas.Ideas to Minimize # Comparators, in variable hysteresis scheme. May 30, 2003.
“The Effect of Hysteresis in the Quantiser of Second Order Sigma-Delta Modulators,” Farrell et al..Proceedings of the 1997 European Conference on Circuit Theory and Design. vol. 3, pp. 1468-1473 (Aug. 31, 1997).

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