Sigma-delta modulator for a D/A converter with pseudorandom jitt

Details Sigma-delta modulator for a D/A converter with pseudorandom jitt Sigma-delta modulator for a D/A converter with pseudorandom jitt

1992-01-09

1993-03-02

Hoff, Marc S.

Coded data generation or conversion

Analog to or from digital conversion

Increasing converter resolution

341143, H03M 120

Patent

active

051913313

ABSTRACT:
The invention relates to a digital sigma-delta modulator for a D/A converter, comprising an integration stage or several cascaded integration stages and a feedback circuit for feedbacking the sign of the output signal of the last integration stage, delayed by one clock cycle and multiplied by a predetermined scaling coefficient, to each integration stage. To avoid limit cycle oscillation, the state of at least the least significant free bit in at least one integration stage is variable at random.

REFERENCES:
patent: 4528551 (1985-07-01), Agrawal et al.
patent: 4811019 (1989-03-01), Julstrom et al.
patent: 4827343 (1989-05-01), Naimpally
patent: 4857928 (1989-08-01), Gailus et al.
patent: 4968987 (1990-11-01), Naka et al.
patent: 5010347 (1991-04-01), Yukawa
patent: 5073777 (1991-12-01), Fukuhara et al.
patent: 5073778 (1991-12-01), Ueki et al.

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