.SIGMA.-.DELTA. modulator-controlled phase-locked-loop circuit

Oscillators – Automatic frequency stabilization using a phase or frequency... – Tuning compensation

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331 25, 332100, 332127, 377 48, H03L 7197, H03K 2368, H04L 2712

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059865121

ABSTRACT:
A .SIGMA..DELTA. modulator-controlled, phase-locked-loop circuit, and an associated method, generates a frequency-regulated signal which does not exhibit undesired tones. Dithering signals are generated and are provided to a .SIGMA..DELTA. modulator. The .SIGMA..DELTA. modulator forms a division-factor control signal used to control the division factor of a frequency divider forming a portion of the PLL circuit. The dithering signals applied to the .SIGMA..DELTA. modulator reduce the likelihood that the .SIGMA..DELTA. modulator shall enter a limit cycle and generate repetitive output signals.

REFERENCES:
patent: 4410954 (1983-10-01), Wheatley, III
patent: 5038117 (1991-08-01), Miller
patent: 5079521 (1992-01-01), Gaskell et al.
patent: 5305362 (1994-04-01), Miller
patent: 5825253 (1998-10-01), Mathe et al.
Sigma Delta Modulator with a Random Output Bit Stream of Specified 1/0 Average Ratio by Itzhak Shperling, XP 000349609; Motorola Technical Developments, vol. 18, Mar. 1993, pp. 156-160.

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