Sigma-delta modulator and method for suppressing a...

Coded data generation or conversion – Analog to or from digital conversion – Differential encoder and/or decoder

Reexamination Certificate

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C375S213000, C375S350000, C375S140000, 36, 36, 36, 36, 38, 38, 38, 38, C377S042000, C377S048000, C377S076000, C340S398100

Reexamination Certificate

active

06249238

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a sigma-delta modulator for conversion of a an analog or digital low-frequency input signal of a high resolution into a quantized analog or digital signal, which has an error feedback circuit for suppression of quantization errors. It also relates to a method for suppressing quantization errors in this type of sigma-delta modulator.
2. Prior Art
Sigma-delta modulators convert low frequency signals of high resolution, which can be in analog or digital form, into scanned, coarse quantized signals with a comparatively high scan rate. This output signal can similarly be prepared in analog or digital form. Quantization noise arises because of this coarse quantization (often only a single bit is used for the quantization). An attempt is made to shape this noise by error feedback so that the noise spectrum in the interesting low frequency band (the frequency band for the input signal) is very small, but increases at higher frequencies. High frequency noise may be largely eliminated by a low-pass filter.
A sigma-delta modulator can be used, for example, as an analog/digital converter (A/D converter); an analog input signal is converted into a high frequency digital pulse sequence with a weight of ±1, for example. The reverse, namely the use of a sigma-delta modulator as a digital/analog converter (D/A converter), is also possible. The digital input signal, for example, has a 16-bit word length with a scanning rate of, e.g., 48 kHz. The output signal can be, for example, a high frequency sequence of discrete analog values (for example ±1 volt with a scanning rate of 1 MHz). A sigma-delta modulator can also be used as a digital/digital converter (D/D converter), which converts a digital pulse sequence of high resolution (e.g. 16 it) and low scanning rate (e.g. 48 kHz) into a digital pulse sequence of low resolution (e.g. 1 bit) and high scanning rate (e.g. 1 Mz). An application for this type of D/D converter is described, e.g., in DE-A 198 19 069. This publication shows that an analog signal can be multiplied with a digital signal with the help of a purely digital sigma-delta modulator. This principle is used there for analysis of an analog sensor signal. Sigma-delta modulators of 2
nd
order with a one bit quantization are, for example, described in the article “A Use of Double Integration in Sigma Delta Modulation”, by J. Candy, IEEE, Transactions on Communications”, March 1985. The modulator described there comprises a 1
st
order modulator, which has an added feedback loop. It was pointed out in this reference that in the case of 1 bit quantization further feedback loops for increasing the modulation degree (degree ≧3) lead to unstable structures.
Topologies that guarantee the stability of a sigma-delta modulator with 1 bit quantization with suitable dimensions are described in “Theory and Practical Implementation of a Fifth-Order Sigma-Delta AID Converter”, by R. W. Adams, et al, J. Audio Eng. Soc., Vol. 39, Nr. 718, 1991. The named article relates, for example, to an A/D converter with a 5
th
order sigma-delta modulator and a 1-bit quantization.
Sigma-delta modulators can also be used for other purposes than for A/D or D/A converter. For example, the use of several purely digital sigma-delta modulators inside an IIR filter was described in “IIR Filtering on Sigma-delta Modulated Signals”, D. A. Johns, et al, Electronics Letters 14, February 1991, Vol. 27, Nr. 4. Non-linear operations on a data stream of a sigma-delta modulator is described in “Nonlinear Arithmetic Operations on the Delta Sigma Pulse Stream”, M. Freeman, et al, Signal Processing 21, Elsevier Science Publishers, pp. 25 to 35 (1990).
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a sigma-delta modulator in which quantization errors or quantization noise can be suppressed in an effective manner.
This object is attained by a sigma-delta modulator for conversion of an analog or digital low frequency input signal of high resolution into a quantized analog or digital signal, with an error feedback circuit for suppression of quantization errors, which comprises
means for delaying the input signal X for a plurality of time intervals to obtain a plurality of delayed input signals X
i
wherein i=1, 2, . . . , n and the ith one of the delayed input signals Xi is delayed for i scanning periods;
means for addition of the delayed input signals X
i
each delayed by i scanning periods to obtain a sum signal S
i
;
means for producing quantized input signals VZ
i
each delayed by the i scanning periods;
means for addition of the delayed quantized input signals VZ
i
to obtain a second sum signal S
2
; and
means for subtraction of the sum signals S
1
and S
2
from the actual value of the input signal.
The value of n corresponding to a desired order of the sigma-delta modulator can be, e.g., between 1 and 20. Also other values are conceivable, for example n=5. Good results may be obtained, e.g., also with a 3
rd
order sigmadelta modulator (n=3). A very effective suppression of quantization noise takes place in the sigma-delta modulator according to the invention.
The object of the invention is also attained by a method of suppressing quantization errors occurring in the conversion of an analog or digital low frequency input signal X of high resolution to a quantized analog or digital signal Y in a sigma-delta modulator having an error feedback circuit. This method has the following steps:
a) quantizing the input signal X according to a scanning rate f
A
at a time t=m·Ta , wherein m=0,1,2, . . . and Ta is the scanning period of the sigma-delta modulator;
b) delaying the input signal for plurality of time intervals to obtain a plurality of delayed input signals X
i
wherein i=1, 2, . . . , n and the ith delayed input signal is delayed for i scanning periods;
c) adding the delayed input signals X
i
each delayed for i scanning periods to obtain a first sum signal S
i
;
d) producing quantized input signals and delaying them by a plurality of time intervals to obtain a plurality of delayed quantized input signals VZ
i
wherein i=1, 2, . . . , n and the ith quantized input signal is delayed for i scanning periods;
e) adding the delayed quantized input signals VZ
i
to obtain a second sum signal S
2
; and
f) subtracting the sum signals S
1
and S
2
from the actual value of the input signal X.
Advantageous embodiments of the sigma-delta modulator and the method according to the invention are set forth the appended dependent claims and additional description below.
According to a preferred embodiment of the sigma-delta modulator it has means for multiplying the respective delayed input signals X
i
with respective coefficients d
i
of a transformation function so that the first sum S
1
can be represented by S
1
=&Sgr;d
i
X
i
and means for multiplying the respective delayed, quantized input signals VZ
i
with respective coefficients c
i
of the transformation function so that the second sum S
2
can be represented by S
2
=&Sgr;c
i
VZ
i
. The transformation function of the sigma-delta modulator according to the invention is, for example, representable in the following form:
Y
(
z
)=
X
(
z
)·{
a
0
/[1+(
c
1
+d
1

z
−1
+(
c
2
+d
2

z
−2
+ . . . +(
c
n
+d
n

z
−n
]}
+
E
(
z
)·{[1
+d
1
·z
−1
+d
2
·z
−2
+ . . . +d
n
·z
−n
]/[1+(
c
1
+d
1

z
−1
+(
c
2
+d
2

z
−2
+ . . . +(
c
n
+d
n

z
−n
]}  (1)
The transformation function of the system is represented here with the help of a Z transformation. Z is a frequency variable for representation of the transformation function in frequency space. X(z) or Y(z) is the Z-transformed (frequency spectrum) input signal X or the output signal Y. E(z) represents the Z-transformed (frequency s

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