Sigma-delta modulator

Coded data generation or conversion – Analog to or from digital conversion – Differential encoder and/or decoder

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375 26, H03M 302

Patent

active

052989003

ABSTRACT:
A sigma-delta modulator includes a first integrator receiving a difference between an input signal being weighted by a first coefficient, and a first reference signal being weighted by a second coefficient. A second integrator receives a difference between the output signal of the first integrator being weighted by a third coefficient, and the first reference signal being weighted by a fourth coefficient. A first quantizer receives the output signal of the second integrator being weighted by a fifth coefficient. A first digital/analog converter converts the output signal of the first quantizer into the first reference signal. A third integrator receives a difference between the output signal of the second integrator being weighted by a sixth coefficient, and a second reference signal being weighted by a seventh coefficient. A second quantizer receive the output signal of the third integrator being weighted by an eighth coefficient. A logic circuit adds together the output signals of the first and second quantizers. A second digital/analog converter converts the output signal of the logic circuit into the second reference signal. A first digital filter is connected downstream of the first quantizer, a second digital filter is connected downstream of the second quantizer, and the digital filters supply output signals being added together.

REFERENCES:
patent: 4920544 (1990-04-01), Endo et al.
patent: 5142286 (1992-08-01), Ribner et al.
patent: 5148167 (1992-09-01), Ribner
patent: 5162799 (1992-11-01), Tanimoto
patent: 5189419 (1993-02-01), Lyden
patent: 5198817 (1993-03-01), Walden et al.
IEEE Transactions on Circuits and Systems, vol. 38, No. 5, May 5, 1991, New York, U.S., pp. 489-497, XP240137, L. A. Williams et al., "Third-Order Cascaded Sigma-Delta Modulators".

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