Sigma-delta modulation circuit

Coded data generation or conversion – Analog to or from digital conversion – Differential encoder and/or decoder

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341155, H03M 300

Patent

active

060577940

ABSTRACT:
A sigma-delta modulation circuit having the function of adjusting an amplitude by a small sized, simplified structure, wherein a parameter stored in a ROM controls an amplitude of a conversion signal in response to an amplitude parameter set by an amplitude control signal, a subtractor outputs the subtraction result of an input signal and the conversion signal, a cumulation circuit generates a cumulation signal, and a binary comparator compares the cumulation signal with a predetermined reference value and generates an output signal of the sigma-delta modulation circuit in accordance with the comparison result. The signal is output to a delay circuit which generates a delay signal by giving a delay time of, for example, one sampling period. The result is input to the ROM. Accordingly, the amplitude of the output signal can be controlled by setting an amplitude parameter.

REFERENCES:
patent: 5278559 (1994-01-01), Yazawa
patent: 5712874 (1998-01-01), Okamoto
patent: 5784017 (1998-07-01), Craven
patent: 5872532 (1999-02-01), Yasuda

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