Sigma-delta converter having a digital logic gate core

Details Sigma-delta converter having a digital logic gate core Sigma-delta converter having a digital logic gate core

1994-03-03

1995-11-28

Hoff, Marc S.

Coded data generation or conversion

Analog to or from digital conversion

Differential encoder and/or decoder

375245, H03M 302

Patent

active

054712092

ABSTRACT:
A sigma-delta A/D converter having a digital logic gate core. The converter is comprised of a loop filter for shaping the converter's quantization noise spectrum. The loop filter is comprised of an unbuffered CMOS logic gate inverter which can be implemented by a gate array. A quantizer is coupled to the loop filter. A logic gate buffer is configured as a one-bit comparator, which is used to perform the quantization. This logic gate buffer can be one of the gates of a gate array. A sampler is coupled to the quantizer for sampling the quantized signal. This sampler can also be implemented by digital circuitry of a gate array. The signal from the sampler is fed into a decimator. The decimator outputs a digital signal representative of the amplitude of the analog signal.

REFERENCES:
patent: 5027120 (1991-06-01), Thurston
patent: 5073777 (1991-12-01), Fukuhara et al.
patent: 5196852 (1993-03-01), Galton
patent: 5208594 (1993-05-01), Yamazaki
patent: 5241310 (1993-08-01), Tiemann

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