Sigma-delta analog-to-digital converter (ADC) with...

Details Sigma-delta analog-to-digital converter (ADC) with... Sigma-delta analog-to-digital converter (ADC) with...

2005-11-22

2005-11-22

JeanPierre, Peguy (Department: 2819)

Coded data generation or conversion

Analog to or from digital conversion

Differential encoder and/or decoder

Reexamination Certificate

active

06967608

ABSTRACT:
A method for reducing the complexity of a multi-bit DAC in a sigma-delta ADC. The DAC resolution can be made to be less than that of the quantizer by canceling truncation error present in multi-bit DACs. Truncation errors are introduced by differences between the digital output word of the quantizer and the digital input word of the feedback DAC(s). The truncation error(s) can be cancelled and eliminated from the system transfer function. A preferred embodiment comprises expanding all feedback loops in the ADC, adding an adjusted truncation error for each feedback loop to an inner feedback loop, and then calculating a correction term for each adjusted truncation error. The correction term can be calculated by zeroing all signals except for the adjusted truncation error being canceled and then calculating a truncation error transfer function.

REFERENCES:
patent: 6313774 (2001-11-01), Zarubinsky et al.
patent: 6452687 (2002-09-01), Suzuki et al.
patent: 6518903 (2003-02-01), Perraud et al.
patent: 6781533 (2004-08-01), Yap et al.
patent: 6825784 (2004-11-01), Zhang
patent: 6842129 (2005-01-01), Robinson
patent: 2002/0093442 (2002-07-01), Gupta

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