Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Reexamination Certificate
2006-04-11
2006-04-11
Chen, Kin-Chan (Department: 1765)
Semiconductor device manufacturing: process
Chemical etching
Vapor phase etching
C438S692000, C428S641000
Reexamination Certificate
active
07026249
ABSTRACT:
The present invention provides a method of fabricating a SiGe-on-insulator substrate in which lattice engineering is employed to decouple the interdependence between SiGe thickness, Ge fraction and strain relaxation. The method includes providing a SiGe-on-insulator substrate material comprising a SiGe alloy layer having a selected in-plane lattice parameter, a selected thickness parameter and a selected Ge content parameter, wherein the selected in-plane lattice parameter has a constant value and one or both of the other parameters, i.e., thickness or Ge content, have adjustable values; and adjusting one or both of the other parameters to final selected values, while maintaining the selected in-plane lattice parameter. The adjusting is achieved utilizing either a thinning process or a thermal dilution process depending on which parameters are fixed and which are adjustable.
REFERENCES:
patent: 5461243 (1995-10-01), Ek et al.
patent: 5759898 (1998-06-01), Ek et al.
patent: 6441393 (2002-08-01), Goetz et al.
patent: 6593625 (2003-07-01), Christiansen et al.
patent: 6602613 (2003-08-01), Fitzgerald
patent: 6607948 (2003-08-01), Sugiyama et al.
patent: 6709909 (2004-03-01), Mizuno et al.
patent: 6841457 (2005-01-01), Bedell et al.
patent: 2004/0142541 (2004-07-01), Cohen et al.
patent: 2004/0241460 (2004-12-01), Bedell et al.
patent: WO 02/27783 (2002-04-01), None
patent: WO 02/082514 (2002-10-01), None
Tezuka, et al., “Fabrication of strained Si on an ultrathin SiGe-on-insulator virtual substrate with a high-Ge fraction”, Applied Physics Letters, vol. 79, No. 12, pp. 1798-1800, Sep. 17, 2001.
Bedell Stephen W.
Chen Huajie
Fogel Keith E.
Sadana Devendra K.
Chen Kin-Chan
International Business Machines - Corporation
Scully , Scott, Murphy & Presser, P.C.
Trepp, Esq. Robert M.
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