Si base substrate covered by a CdTe or Cd-rich CdZnTe layer

Details Si base substrate covered by a CdTe or Cd-rich CdZnTe layer Si base substrate covered by a CdTe or Cd-rich CdZnTe layer

1995-12-13

1996-12-03

Limanek, Robert P.

Active solid-state devices (e.g., transistors, solid-state diode

Physical configuration of semiconductor

With specified crystal plane or axis

257628, 257188, 257190, 257613, 257614, 257 78, 257442, 25037012, H01L 3109, H01L 29161, H01L 2714, H01L 3100

Patent

active

055811175

ABSTRACT:
The present invention provides an Si base semiconductor monocrystal substrate which includes an Si(11n) substrate where n=1.5-2.5. An intermediate layer is formed on the Si(11n) substrate. The intermediate layer is made of a material selected from the group consisting of ZnTe and Zn-rich CdZnTe, The intermediate layer has a thickness in the range of 50-200 angstroms. The intermediate layer is oriented in a (11n')B plane. An upper layer is formed on the intermediate layer. The upper layer is made of a material selected from the group consisting of CdTe and Cd-rich CdZnTe. The upper layer is oriented in a (11n")B plane. The indexes n' and n" satisfy the following equations. ##EQU1## where y is the lattice mismatch between the Si substrate and the intermediate layer. ##EQU2## where y' is the lattice mismatch between the Si substrate and the upper layer.

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