Shunt connection to the emitter of a thyristor

Semiconductor device manufacturing: process – Making regenerative-type switching device – Having field effect structure

Reexamination Certificate

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Reexamination Certificate

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07049182

ABSTRACT:
A semiconductor device is formed having a thyristor, a pass device and a conductive shunt that electrically connects an emitter region of the thyristor with a node near an upper surface of the substrate. In one example embodiment of the present invention, the conductive shunt is formed in a trench in a substrate and extending from an upper surface of the substrate to an emitter region of a vertical thyristor, with the emitter region being in the substrate and below the upper surface. In one implementation, the thyristor includes a thyristor body and a control port, with an N+ emitter region of the thyristor body being in the substrate and below and upper surface thereof. A pass device is formed adjacent to the thyristor, and the conductive shunt is formed in a trench extending from the N+ emitter region to a source/drain region of the pass device. With this approach, thyristor applications can be implemented having an emitter region in a substrate and not necessarily directly accessible, for example, via an upper surface of the substrate. This approach is also useful, for example, in applications where a cathode-down thyristor is used, such as when it is desirable to form the thyristor control port near a bottom portion of the thyristor, and in high-density circuit applications, such as memory arrays.

REFERENCES:
patent: 3943549 (1976-03-01), Jaecklin et al.
patent: 4165517 (1979-08-01), Temple et al.
patent: 4281336 (1981-07-01), Sommer et al.
patent: 4323793 (1982-04-01), Schutten et al.
patent: 4646121 (1987-02-01), Ogura
patent: 4825272 (1989-04-01), Lehmann
patent: 4829357 (1989-05-01), Kasahara
patent: 4864168 (1989-09-01), Kasahara et al.
patent: 4982258 (1991-01-01), Baliga
patent: 5111268 (1992-05-01), Temple
patent: 5412228 (1995-05-01), Baliga
patent: 5463344 (1995-10-01), Temple
patent: 5606186 (1997-02-01), Noda
patent: 6104045 (2000-08-01), Forbes et al.
patent: 6137122 (2000-10-01), Liaw et al.
patent: 6218709 (2001-04-01), Yasuda
patent: 6225165 (2001-05-01), Noble et al.
patent: 6229161 (2001-05-01), Nemati et al.
K. DeMeyer, S. Kubicek and H. van Meer, Raised Source/Drains with Disposable Spacers for sub 100 nm CMOS Technologies, Extended Abstracts of International Workshop on Junction Technology 2001.
Mark Rodder and D. Yeakley, Raised Source/Drain MOSFET with Dual Sidewall Spacers, IEEE Electron Device Letters, vol. 12, No. 3, Mar. 1991.
Yang-Kyu Choi, Daewon Ha, Tsu-Jae King and Chenming Hu, Nanoscale Ultrathin PMOSFETs with Raised Selective Germanium Source/Drain, IEEE Electron Device Letters, vol. 22, No. 9, Sep. 2001.
N. Lindert, Y. K. Choi, L. Chang, E. Anderson, W. C. Lee, T. J. King. J. Bokor, and C. Hu, Quasi-Planar FinFETs with Selectively Grown Germanium Raised Source/Drain, 2001 IEEE International SOI Conference, Oct. 2001.
T. Ohguro, H. Naruse, H. Sugaya, S. Nakamura, E. Morifuji, H. Kimijima, T. Yoshitomi, T. Morimoto, H.S. Momose, Y. Katsumata, and H. Iwai, High Performance RF Characteristics of Raised Gate/Source/Drain CMOS with Co Salicide, 1998 Symposium on VLSI Technology Digest of Technical Papers.
Hsiang-Jen Huang, Kun-Ming Chen, Tiao-Yuan Huang, Tien-Sheng Chao, Guo-Wei Huang, Chao-Hsin Chien, and Chun-Yen Chang, Improved Low Temperature Characteristics of P-Channel MOSFETs with Si1-xGex Raised Source and Drain, IEEE Transactions on Electron Devices, vol. 48, No. 8, Aug. 2001.
Nemati, Farid and Plummer, James, D., A Novel High Density, Low Voltage SRAM Cell with a Vertical NDR Device, VLSI Technology Technical Digest, Jun. 1998.
Nemati, Farid and Plummer, James, D., A Novel Thyristor-based SRAM Cell (T-RAM) for High-Speed, Low-Voltage, Giga-scale Memories, International Electron Device Meeting Technical Digest, 1999.
Gribnikov, Z.S., Korobov, V.A., and Mitin, V.V., The Tunnel Didoe as a Thyristor Emitter, Solid-State Electronics, vol. 42, No. 9, 1998, pp. 1761-1763.

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