Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Assembly of plural semiconductive substrates each possessing...
Reexamination Certificate
1999-12-13
2001-09-11
Bowers, Charles (Department: 2813)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Assembly of plural semiconductive substrates each possessing...
C438S109000, C438S126000
Reexamination Certificate
active
06287892
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device, and more specifically to a semiconductor device having a three-dimensionally laminate structure of a bare chip on a substrate.
2. Description of Related Art
To achieve higher density, compactness, and larger capacity in a semiconductor chip, particularly with regard to packaging of semiconductor memory devices, the method of three-dimensional lamination of chips is widely used. By using this structure, it is possible to achieve a great reduction in mounting surface area.
However, when three-dimensional mounting is done, because differences in coefficients of thermal expansion, stress and strain caused by thermal history, and subsequent failed connections can occur. In applications to spacecraft, it is necessary to consider immunity to vibration and shock as well, and several related methods have been proposed.
For example, as noted in Japanese Unexamined Patent Publication No. 6-275775 and shown in
FIG. 3
, there is a structure in which a chip
2
is mounted to a TAB (tape automated bonding) tape, to form a TAB device, this having a three layer laminated structure (
17
A through
17
C) mounted on a motherboard
19
.
In
FIG. 3
, the chip
2
is connected to carrier
10
via the lead
11
by a bump
13
or by the flip-chip method. The TAB tape side part of the chip
2
is covered by a protective resin
12
. The TAB device is mounted on a module plate
14
. The module plate
14
is made from a material that has good resistance to heat and that has as good a thermal conductivity as possible.
When-mounting the TAB device to the module plate
14
, the TAB device is mounted within the depression
15
of the module plate
14
, so that the rear surface of the chip
2
makes contact with the inside surface of the depression
15
, using an adhesive material
6
that has good thermal conductivity. The outer lead part of the lead
11
of the TAB device is connected to a connection pattern on the outer surface of the module plate
14
, thereby forming the module units
17
A through
17
C, which are made of TAB devices and module plates
14
.
A plurality of modular units
17
A through
17
C are laminated with an intervening shock-absorbing element
18
therebetween. Because the shock-absorbing elements
18
are made of an anistropic electrically conductive resin or an anisotropic electrically conductive rubber and are configured so that there is conduction only in the up/down direction, the laminated modular units are electrically connected. By virtue of the above-noted structure, the shock-absorbing elements
18
absorb externally applied shock and vibration, thereby providing an improvement in the vibration immunity of the device.
Other prior art is disclosed in the Japanese Patent Publication H2-42739. As shown in FIG.
4
(
a
), a elastic adhesive material layer
20
is formed on an insulating substrate
1
. Pads
21
and a wiring pattern are formed on top of this elastic adhesive material layer
20
. Next, a chip
2
is connected to the top of the pads
21
by means of the bumps
22
.
As shown in FIG.
4
(
b
), after forming an elastic adhesive material layer
20
on the top of an insulating substrate
1
, parts other than the pads
21
and the wiring pattern are removed by etching. Then, a chip
2
is connected to the top of the remaining pads
21
using the bumps
22
.
By adopting a structure such as described above, the elastic adhesive material layer
20
acts as a shock-absorbing layer which intervenes between the chip
2
and the substrate
1
, thereby improving the connection reliability therebetween.
In the prior art that was disclosed in the Japanese Unexamined Patent Publication No. 6-275775, modular units are laminated and the material used for the purpose of making electrical connections therebetween is an anisotropic electrically conductive resin or an anisotropic electrically conductive rubber. In general, anisotropic electrically conductive resin and anisotropic electrically conductive rubber present the problem of having a large electrical resistance compared with a metal, thereby making actual low-voltage applications, particularly to memory chips, difficult.
In the prior art that is noted in the Japanese Patent Publication H2-42739, solder is used for the connection between the substrate and the chip, and it is realistic to use flux for the purpose of making a reliable connection therebetween. However, if there are residual halogen ions remaining in the flux, it is known that an adverse affect will result on the bare chip.
For this reason, it is desirable to avoid the use of solder in precision equipment such as that used in spacecraft, and to use a material such as gold or the like which does not require flux. In the case of making a flip-chip connection using bumps made of gold, it is necessary to apply force and vibration as well as heat. When this is done, to achieve a reliable connection, it is necessary for the land to have some degree of hardness.
However, in the above-noted prior art, it is difficult to make a connection a bump made of gold or the like with a land on the substrate, because an elastic adhesive material is provided immediately below the land. Additionally, the manufacturing process is complex, and the cost is high.
In view of the above-described drawbacks in the prior art, an object of the present invention is to provide a semiconductor device capable of improving immunity to vibration and shock and having an extremely simple structure.
Accordingly, the object of the present invention is to provide a semiconductor device in which when a plurality of substrates are stacked, the connecting portion can be made with a greater electrical conductivity and can be driven with a relatively lower voltage level.
SUMMARY OF THE INVENTION
To achieve the above-noted object, the present invention is a method of producing semiconductor device having a laminated structure in which a plurality of substrates on one of surfaces of which semiconductor chips are mounted, are laminated and mutually connected electrically to each other, said structure comprising a shock-absorbing material which can absorb shock and vibration disposed between an upper surfaces of said semiconductor chip and another surface of said substrate opposite to said surface thereof.
The present invention includes a method for producing a semiconductor device having laminated structure in which a plurality of substrates on one of surfaces of which semiconductor chips are mounted, are laminated and mutually connected electrically to each other, said method comprising the steps of; a first step of forming a metallic bump on a surface of semiconductor device; a second step of coating a pad portion of said substrate with the metal so as to assemble said semiconductor chip with said substrate; a third step of connecting said semiconductor device to said substrate utilizing a flip-chip method; a fourth step of sealing the connecting portion of said connected portion with sealing resin; a fifth step of disposing solder bumps between said substrate each being made in said third step and stacking a plurality of said substrates each other; a sixth step of electrically connecting said stacked substrates with each other; and a seventh step of filling a shock-absorbing material which can absorb shock and vibration, between an upper surface of said semiconductor chip and another surface.
According to the present invention, a semiconductor device having a laminated construction is provided which includes a first substrate and a second substrate onto which chips are mounted, the above-noted second substrate being mounted on the above-noted first substrate, and a shock-absorbing material being provided between the front surface of the semiconductor chip on the first substrate and the rear surface of the second substrate.
A feature of the present invention is that the above-noted first and second substrates are mutually connected by means of bumps that are metal electrodes, and that the space between the
Hashimoto Katsumasa
Kyougoku Yoshitaka
Miyazaki Shinichi
Takahashi Nobuaki
Bowers Charles
NEC Corporation
Pert Evan
Young & Thompson
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