Shifting an operand left or right while minimizing the...

Details Shifting an operand left or right while minimizing the... Shifting an operand left or right while minimizing the...

2006-01-03

2006-01-03

Ngo, Chuong D (Department: 2193)

Electrical computers: arithmetic processing and calculating

Electrical digital calculating computer

Particular function performed

Reexamination Certificate

active

06983297

ABSTRACT:
A log shifter shifting an operand left or right while minimizing the number of multiplexor stages. The log shifter may contain a set of multiplexor stages, with at least one multiplexor stage shifting a data value to the right and at least one other multiplexor stage shifting to the right. Left and right shifts may thus be obtained by using a single set of multiplexor stages. As a result, time delays and area consumed may be reduced when the upper/lower end of a desired shift value range does not equal 2Q−1, wherein Q equals an integer.

REFERENCES:
patent: 4829460 (1989-05-01), Ito
patent: 5726926 (1998-03-01), Makino
patent: 5961575 (1999-10-01), Hervin et al.
patent: 5978822 (1999-11-01), Muwafi et al.

Affiliated with

Also associated with

Rating

Shifting an operand left or right while minimizing the... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Shifting an operand left or right while minimizing the..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Shifting an operand left or right while minimizing the... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3568053