Shift registrer and driving method thereof

Details Shift registrer and driving method thereof Shift registrer and driving method thereof

2007-10-30

2007-10-30

Cox, Cassandra (Department: 2816)

Electrical pulse counters, pulse dividers, or shift registers: c

Shift register

Compensating for or preventing signal deterioration

C377S058000

Reexamination Certificate

active

10963510

ABSTRACT:
A shift register having a plurality of stages for shifting a start pulse and outputting a shifted start pulse to a next stage, each of the plurality of stages includes a pull-up transistor controlled by a first node to apply a first clock signal to an output line, a first pull-down transistor controlled by a second node to apply a first driving voltage to the output line, a controller for controlling the first and second nodes, and a compensating capacitor connected between the first node and an input line of a second clock signal, the second clock signal being different from the first clock signal.

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