Shift register with low power consumption

Details Shift register with low power consumption Shift register with low power consumption

2009-11-13

2011-11-08

Lam, Tuan T (Department: 2816)

Electrical pulse counters, pulse dividers, or shift registers: c

Shift register

C377S068000, C377S078000, C377S079000

Reexamination Certificate

active

08054935

ABSTRACT:
A shift register comprising a plurality of shift register stages {SN}, N=1, 2, . . . , M, M being a nonzero positive integer. Each of the plurality of shift register stages, SN, comprises a first input, a second input, a third input for receiving a first clock signal CK, a fourth input for receiving a second clock signal XCK, an output for providing an output signal OUT(N), therefrom. The plurality of stages {SN} is electrically connected to each other in serial such that the first input of the shift register stage SNis electrically connected to the output of the (N−1)-th shift register stage SN−1for receiving an output signal OUT(N−1) therefrom, the second input of the shift register stage SNis electrically connected to the output of the (N+1)-th shift register stage SN+1for receiving an output signal OUT(N+1) therefrom, and the output of the shift register stage SNis electrically connected to the first input of the (N+1)-th shift register stage, SN+1for providing the output signal OUT(N+1) thereto.

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patent: 2099018 (2009-09-01), None

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