Shift register with four phase clocks

Details Shift register with four phase clocks Shift register with four phase clocks

2007-10-16

2007-10-16

Lam, Tuan T. (Department: 2816)

Electrical pulse counters, pulse dividers, or shift registers: c

Shift register

C345S100000

Reexamination Certificate

active

11399803

ABSTRACT:
A shift register comprising means for providing a first pair of clock signals, CLK1and XCLK1, with a first frequency, f1, and a second pair of clock signals, CLK2and XCLK2, with a second frequency, f2, where the second frequency f2is different from the first frequency f1, and means for generating a plurality of signals responsive to a start pulse signal, the first pair of clock signals CLK1and XCLK1, and the second pair of clock signals CLK2and XCLK2. Each of the plurality of signals is sequentially shifted from the start pulse signal.

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