Shift register-latch circuit driven by clocks with half cycle ph

Details Shift register-latch circuit driven by clocks with half cycle ph Shift register-latch circuit driven by clocks with half cycle ph

1980-05-07

1983-06-07

Thomas, James D.

Electrical pulse counters, pulse dividers, or shift registers: c

Shift register

Particular transfer means

364900, 364712, 377 43, 377 49, G06F 748

Patent

active

043872948

ABSTRACT:
In a multiple stage data transfer circuit, suitable for transferring a plurality of bits to or from a bit processor or 1-bit arithmetic logic unit, each bit stage includes a shift register portion and a latch portion. Each shift register(S/R) portion is constructed of a series circuit consisting of a static (input) inverter, a switching element, and a dynamic (output) inverter. Each latch portion is constructed of a closed loop consisting of a static inverter, a switching element, and a dynamic inverter. Each bit stage also includes a data transfer switch element, which may be activated through an externally connected control line. The data transfer switch is coupled beween the data output terminal of the S/R switch and the data output terminal of the latch switch. The S/R and latch portion switches are activated by two different clocks, with a phase deviation therebetween of one-half cycle. When the S/R switch and data transfer switch are both "ON", data may flow from the S/R's input inverter to the latch. When the latch switch and the data transfer switch are both "ON", data may flow from the latch to the S/R's output inverter.

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patent: 4348722 (1982-09-01), Gunter et al.
patent: 4348741 (1982-09-01), McAlister et al.

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