Shift register delay circuit

Details Shift register delay circuit Shift register delay circuit

1982-09-16

1985-07-16

Anagnos, Larry N.

Electrical pulse counters, pulse dividers, or shift registers: c

Systems

Counter controlled counter

307602, 307603, 377 47, 377 52, 377 54, H03K 513, H03K 2136, H03K 2300, G11C 1900

Patent

active

045301077

ABSTRACT:
The clock signal to a fine delay shift register is divided by the number of fine delay bits for application to a coarse delay shift register such that two serially connected shift registers can provide a range of delays equivalent to a shift register having a number of bits equal to the product of the bits of the two shift registers.

REFERENCES:
patent: 3633113 (1972-01-01), Grubel et al.
patent: 3646371 (1972-02-01), Flad
patent: 3728635 (1973-04-01), Eisenberg
patent: 3840174 (1974-10-01), Craft
patent: 4137568 (1979-01-01), Dlugos
patent: 4277693 (1981-07-01), Hoekman
patent: 4433426 (1984-02-01), Forster et al.

Affiliated with

Also associated with

Rating

Shift register delay circuit does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Shift register delay circuit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Shift register delay circuit will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1739802