Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reexamination Certificate
2007-03-20
2007-03-20
Hjerpe, Richard (Department: 2629)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
C345S599000, C377S064000, C377S078000
Reexamination Certificate
active
11060963
ABSTRACT:
A shift register circuit includes a plurality of latch circuits connected in series to sequentially transfer a pulse signal ST from one to another, a clock signal line transmitting a clock signal CLK, and a plurality of switching circuits performing electrical connection and disconnection between the clock signal line and the plurality of latch circuits. Upon turning on the shift register, at least one of the switching circuits electrically disconnects at least one of the latch circuits from the clock signal line. During an initialization period immediately after power has been turned on, the frequency of the clock signal CLK is lower than in a normal operation period and gradually increases toward the frequency used in the normal operation period.
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Kubota Yasushi
Washio Hajime
Yoshida Shigeto
Conlin David G.
Dinh Duc
Edwards Angell Palmer & & Dodge LLP
Hjerpe Richard
Sharp Kabushiki Kaisha
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