Shift register circuit and drive control apparatus

Details Shift register circuit and drive control apparatus Shift register circuit and drive control apparatus

2006-03-09

2010-06-08

Nguyen, Jimmy H (Department: 2629)

Computer graphics processing and selective visual display system

Plural physical display element control system

Display elements arranged in matrix

C345S076000, C377S064000

Reexamination Certificate

active

07733320

ABSTRACT:
A shift register circuit includes a plurality of cascade-connected signal holding circuits each of the signal holding circuits includes an input control circuit to which an input signal is applied, and which fetches and holds the input signal, an output control circuit to which a first control clock signal is applied, and which outputs an output signal corresponding to timings of the held input signal and the first control clock signal, and a reset control circuit to which a reset signal is applied, and which initializes a signal level of the input signal held in the input control circuit. A timing at which the output signal is terminated is set to be ahead of an application start timing of the reset signal.

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Chinese Office Action (and English translation thereof) dated Jul. 4, 2008, issued in a counterpart Chinese Application.
Taiwanese Office Action dated Nov. 11, 2009 and English translation thereof issued in a counterpart Taiwanese Application No. 095108496.

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