Shift register circuit

Electrical pulse counters – pulse dividers – or shift registers: c – Shift register

Reexamination Certificate

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Details

C377S070000, C377S074000

Reexamination Certificate

active

07460634

ABSTRACT:
Each stage of a shift register circuit has a first input (Rn−1) connected to the output of the preceding stage, a drive transistor (Tdrive)for coupling a first clocked power line voltage (Pn) to the output (Rn) of the stage, a compensation capacitor (C1) for compensating for the effects of a parasitic capacitance of the drive transistor, a first bootstrap capacitor (C2) connected between the gate of the drive transistor and the output (Rn) of the stage; and an input transistor (Tin1) for charging the first bootstrap capacitor (C2) and controlled by the first input (Rn−1). Each stage has an input section (10) coupled to the output (Rn−2) of the stage two stages before the stage having a second bootstrap capacitor (C3) connected between the gate of the input transistor (Tin1) and the first input (Rn−1). The use of two bootstrapping capacitors makes the circuit less sensitive to threshold voltage levels or variations, and enables implementation using amorphous silicon technology.

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patent: 2003/0090481 (2003-05-01), Kimura
patent: 2007/0127620 (2007-06-01), Moon et al.
patent: WO0245256 (2002-06-01), None

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