Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reexamination Certificate
2004-07-09
2010-02-09
Awad, Amr (Department: 2629)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
C345S098000
Reexamination Certificate
active
07659877
ABSTRACT:
A shift register includes control circuits CNi (i=1 through n) corresponding to respective blocks, and a level shifter LSi+1 of the next stage is controlled by one of the outputs of the shift register and one of the outputs of flip-flops Fi. With this, a level shifter of the present stage operates only for a period minimum for outputting the shift output from the present block, so that the power consumption is reduced, Furthermore, it is possible to cause the outputs SL1through SLn not to overlap each other.
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Gyouten Seijirou
Matsuda Eiji
Murakami Yuhichiroh
Tsujino Sachio
Washio Hajime
Awad Amr
Nixon & Vanderhye PC
Pervan Michael
Sharp Kabushiki Kaisha
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