Shift and rotate circuit for a data processor

Details Shift and rotate circuit for a data processor Shift and rotate circuit for a data processor

1974-12-16

1976-12-07

Zache, Raulfe B.

Communications: electrical

Digital comparator systems

G06F 700, G06F 1300, G11C 1900

Patent

active

039965660

ABSTRACT:
A shift and rotate circuit is disclosed for a processor which receives 16-bit words as input data, which breaks down each received word into four 4-bit bytes, and which performs logical and arithmetic operations on each word on a byte-by-byte basis. A word is shifted a specified number of bit positions (1) by entering the word byte-by-byte in consecutive locations of a first 4-bit wide memory, (2) by entering the same word in an ordered byte sequence in a second 4-bit wide memory with the ordered sequence being determined by the number of bit positions the word is to be shifted, and (3) by concurrently applying the contents of both memories byte-by-byte to the shift and rotate circuit which shift the received information to the required number of bit positions and writes the shifted information into consecutive locations of the second memory. The 4-bit bytes of the shifted word are ultimately reconstituted into a 16-bit word and outputted onto the I/O system.

REFERENCES:
patent: 3228005 (1966-01-01), Delmege et al.
patent: 3270324 (1966-08-01), Meade et al.
patent: 3475730 (1969-10-01), Figueroa et al.
patent: 3500466 (1970-03-01), Carleton
patent: 3516069 (1970-06-01), Bray et al.
patent: 3778778 (1973-12-01), Ragen
patent: 3781812 (1973-12-01), Wymore et al.
patent: 3820079 (1974-06-01), Bergh et al.

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