Shielding mesh design for an integrated circuit device

Details Shielding mesh design for an integrated circuit device Shielding mesh design for an integrated circuit device

2009-01-22

2011-12-06

Doan, Nghia (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Integrated circuit design processing

Physical design processing

C716S100000, C716S101000, C716S106000, C716S109000, C716S110000, C716S111000, C716S120000, C257S409000, C257S508000, C257S659000, C257S662000, C438S731000

Reexamination Certificate

active

08074197

ABSTRACT:
Methods and apparatuses to design an Integrated Circuit (IC) with a shielding of wires. In at least one embodiment, a shielding mesh of at least two reference voltages (e.g., power and ground) is used to reduce both the capacitive coupling and the inductive coupling in routed signal wires in IC chips. In some embodiments, a type of shielding mesh (e.g., a shielding mesh with a window surrounded by a power ring, or a window with a parser set of shielding wires) is selected to make more routing area available in locally congested areas. In other embodiments, the shielding mesh is used to create or add bypass capacitance. Other embodiments are also disclosed.

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