Shared memory with two distinct addressing structures

Boots – shoes – and leggings

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G06F 1300

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active

046427554

ABSTRACT:
A communication method and digital multi-customer data interface for interconnecting a number of customer terminals to a main packet switching network of a local area data transport system that provides data communication services such as interactive video text service between data service vendors and customers. The digital multi-customer interface utilizes a main processor, control circuit, and multi-customer protocol controller to implement the protocol functions for the communication of packets and control information over individual serial transmission paths. The multi-customer protocol controller comprises a control processor and a formatter circuit for synchronously communicating packets for a plurality of customer terminals via customer line units and customer lines. The control circuit handles communication of all control and status information between the main processor and the customer line units. The control processor includes a shared memory and first-in first-out memories that are used to communicate messages with the main processor. Both processors address the shared memory with logical addresses, and the control processor's logical address space is structured so as to facilitate the use of relative addressing.

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David A. Rennels, Algirdas Avizienis & Milos Ercegovac "A Study of Standard Building Blocks for the Design of Fault-Tolerant Distributed Computer Systems", IEEE Computer Society, Jun. 21-23, 1978, Toulouse, France, pp. 144-149.

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