Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Patent
1993-08-04
1996-07-16
Saras, Steven
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
345 98, 345200, G09G 300
Patent
active
055371280
ABSTRACT:
The video memory and the half-frame buffer frame accelerator of a dual scan LCD display are integral in a single memory device. Flat-panel read and write cycles to the frame accelerator designed area inside the memory are optimized in order to minimize memory bandwidth requirements. Extra memory space in the memory device may be used to buffer multiple half-frames of shaded data in such a manner as to save a considerable amount of power in the LCD display graphics system.
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Bril Vlad
Keene David
Lin Dennis Z.
Cirrus Logic Inc.
Saras Steven
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