Shared memory computer method and apparatus

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G06F 1300

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active

047077816

ABSTRACT:
A shared memory computer method and apparatus having a plurality of sources, a memory manager, and memory units in which the memory locations of data items are randomly distributed. The memory manager includes a translation module for locating data items in the memory units and a temporary storage buffer for storing at least a portion of messages between sources and the memory units with respect to data items.

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patent: 4445171 (1984-04-01), Neches
"The Implementation of the Cm Multi-Microprocessor", written by Swan, AFIPS Conf. Proceedings, Jun. 13-16, 1977, 645-655.

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