Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element
Reexamination Certificate
2006-06-20
2008-12-16
Karlsen, Ernest F (Department: 2829)
Electricity: measuring and testing
Fault detecting in electric circuits and of electric components
Of individual circuit component or element
C365S201000, C714S718000
Reexamination Certificate
active
07466160
ABSTRACT:
A system is provided for testing a first integrated circuit associated with at least a second integrated circuit in a semiconductor device, wherein at least some external terminals for the semiconductor device are to be shared by the first and second integrated circuits, and wherein the first integrated circuit is designed for normal operation and a test mode. The system includes a plurality of multiplexer circuits. Each multiplexer circuit is operable to receive a respective signal from the second integrated circuit when the first integrated circuit is in normal operation. Each multiplexer circuit is further operable to receive a respective signal from either the second integrated circuit or an associated external terminal when the first integrated circuit is in test mode. An external terminal of the semiconductor device operable to receive a signal for causing the first integrated circuit to transition between normal operation and the test mode.
REFERENCES:
patent: 5594694 (1997-01-01), Roohparvar et al.
patent: 5825697 (1998-10-01), Gilliam et al.
patent: 6191603 (2001-02-01), Muradali et al.
patent: 6216240 (2001-04-01), Won et al.
patent: 6365421 (2002-04-01), Debenham et al.
patent: 6370661 (2002-04-01), Miner
patent: 6457141 (2002-09-01), Kim et al.
patent: 6492727 (2002-12-01), Nishizawa et al.
patent: 6519171 (2003-02-01), Matsuzaki et al.
patent: 6531339 (2003-03-01), King et al.
patent: 6711042 (2004-03-01), Ishikawa
patent: 6732304 (2004-05-01), Ong
patent: 6762486 (2004-07-01), Inoue et al.
patent: 6812726 (2004-11-01), Ong
patent: 6825683 (2004-11-01), Berndt et al.
patent: 6882171 (2005-04-01), Ong
patent: 6967397 (2005-11-01), Inoue et al.
patent: 6996652 (2006-02-01), Ong
patent: 7006940 (2006-02-01), Ong
patent: 7053470 (2006-05-01), Sellers et al.
patent: 7061263 (2006-06-01), Ong
patent: 7075175 (2006-07-01), Kazi et al.
patent: 7133798 (2006-11-01), Ong
patent: 7139945 (2006-11-01), Ong
patent: 7149135 (2006-12-01), Okuno
patent: 7269765 (2007-09-01), Charlton et al.
patent: 7305595 (2007-12-01), Goodwin et al.
patent: 2004/0100296 (2004-05-01), Ong
patent: 2004/0196709 (2004-10-01), Ong
patent: 2005/0024977 (2005-02-01), Ong
patent: 2005/0204223 (2005-09-01), Ong
patent: 2005/0289428 (2005-12-01), Ong
patent: 2006/0152241 (2006-07-01), Ong
Baliga Naresh
Lin Chiate
Ong Adrian E.
Carr & Ferrell LLP
Inapac Technology, Inc.
Karlsen Ernest F
LandOfFree
Shared memory bus architecture for system with processor and... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Shared memory bus architecture for system with processor and..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Shared memory bus architecture for system with processor and... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4044197