Shared line buffer architecture for a video processing circuit

Details Shared line buffer architecture for a video processing circuit Shared line buffer architecture for a video processing circuit

1994-03-04

1995-11-21

Britton, Howard W.

Television

Image signal processing circuitry specific to television

Special effects

348448, 348552, 348568, H04N 724

Patent

active

054692237

ABSTRACT:
A single line buffer in a motion video card is used for both vertical reduction of the pixel image before storage in a video memory buffer and vertical expansion of the pixel image after being outputted by the video memory buffer. When the desired display size is smaller than the original pixel image size, then the line buffer is used by the input pipeline to reduce the image. When the desired display size is larger than the original pixel image size (or larger than the image stored in the memory buffer), then the line buffer is used by the output pipeline to enlarge the image.

REFERENCES:
patent: 4897855 (1990-01-01), Acampora
patent: 4941045 (1990-07-01), Birch
patent: 5008752 (1991-04-01), Van Nostrand
patent: 5307164 (1994-04-01), Dong-Il
patent: 5363140 (1994-11-01), Isomoto

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