Shared gate CMOS transistor

Details Shared gate CMOS transistor Shared gate CMOS transistor

1989-09-05

1991-03-05

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 34, 437913, 437915, H01L 2172

Patent

active

049977857

ABSTRACT:
A stacked shared-gate CMOS transistor and method of fabrication are disclosed. An improved CMOS transistor is fabricated by the formation of a bulk transistor and an overlying isolated (SOI) transistor wherein each transistor is adjoined to a portion of a shared gate having the same conductivity type as the related transistor. The differential conductivity of the shared gate is obtained by the fabrication of a conductive diffusion-barrier layer intermediate to conductive layers. Improved switching performance is obtained as a result of higher current levels produced by the isolated transistor.

REFERENCES:
patent: 4467518 (1984-08-01), Bansal et al.
patent: 4637128 (1987-01-01), Mizutani
patent: 4642880 (1987-02-01), Mizutani et al.
patent: 4651408 (1987-03-01), MacElwee et al.
patent: 4876213 (1989-10-01), Pfiester
patent: 4918510 (1990-04-01), Pfiester
J. H. Douglass, "The Route to 3-D Chips," High Technology, Sep. 1983, pp. 55-59.

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