Shared charge pump voltage ramp

Details Shared charge pump voltage ramp Shared charge pump voltage ramp

1999-12-06

2001-11-13

Ballato, Josie (Department: 2836)

Electrical transmission or interconnection systems

Plural load circuit systems

Plural sources of supply

C307S018000, C307S031000, C307S038000

Reexamination Certificate

active

06316843

ABSTRACT:

FIELD OF THE INVENTION
The field of the invention is integrated circuits, in particular circuits that have on-chip power generation circuits, such as charge pumps.
BACKGROUND OF THE INVENTION
In modern integrated circuits, there is a need for more voltage levels than are supplied on the printed circuit board. For example, a DRAM with a negative wordline scheme will require the wordline voltage (e.g. −0.5V) and also a negative substrate bias (e.g. −0.75V). Positive voltages will include the boosted wordline voltage (e.g. 3.3V), the internal voltage (e.g. 2.5V), the bit-line high voltage (e.g. 2.1V), etc.
Some of the power supply levels will need to handle much more current than others. The high-current levels will ramp up quickly during a power-on period, while the levels that need only low current will have charge pumps with a smaller capacity in order to save power and will take longer to reach their level, even if that level has a smaller absolute value than the high-capacity level.
The lower capacity pumps could be redesigned with increased capacity so that it will improve the ramp-up speed, but that would waste silicon area, and consume more power.
SUMMARY OF THE INVENTION
The invention relates to an on-chip voltage generator system that provides for reduced voltage ramp up time by sharing charge pumps. During an initial period, the distribution bus for the most negative (or most positive) voltage is tied to the next negative (or positive) voltage, so that all the pumps for the two voltages operate on both lines in this period. When the next negative (or positive) voltage is reached, the buses are separated and a selected set of charge pumps continues to ramp up to the most negative (or positive) level.
A feature of the invention is the provision of switchable bus connection circuits. Initially through these switches the buses are tied together through these switches, so that the generators drive all the buses to the next negative (or positive) level. When this level is reached, the switchable bus connection circuits switch off and untie the buses. This approach is especially advantageous when the generator used for driving to the next negative (or positive) level is weak, and by joining the generators, it will speed up the ramp time.
Another feature of the invention is the provision of multiplexer switches that allow a generator to connect to one of two buses. During the power ramp time, the generator is connected to the most negative (or positive) voltage level. When the next negative (or positive) voltage level is reached, the bus connection switch opens and the generator continues to drive the second bus to the most negative (or positive) value. When this level is reached, the multiplexer switches the connection so that the same generator will maintain the first bus at the next negative (or positive) level during normal operation. This approach is advantageous when the original generator designed to drive the bus to the most negative (or positive) level is weak due to a lower current demand. Multiplexing the generator from its normal connection (to the first bus) to drive the second bus to the most negative (or positive) level will speed up the ramp time.
Yet another feature of the invention is the provision of a bus selection circuit that connects a pump to both of selected buses until the lower bus voltage is reached and thereafter only to the higher voltage. When the higher voltage is reached, the pump is reconnected to the lower bus.


REFERENCES:
patent: 6212109 (2001-04-01), Proebstring

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