Shared buffer type variable length packet switch

Details Shared buffer type variable length packet switch Shared buffer type variable length packet switch

2005-12-20

2005-12-20

Qureshi, Afsar (Department: 2667)

Multiplex communications

Pathfinding or routing

Switching a message which includes an address header

C370S395720, C370S428000, C711S153000, C710S056000

Reexamination Certificate

active

06977941

ABSTRACT:
A packet switch having a structure of writing a variable length packet received from each of input lines into a shared buffer memory on a fixed length data block unit basis, wherein a buffer controller forms an input queue for each input line and, when the last data block of a variable length packet is registered in the input queue, links a linked address list for the input queue to one or a plurality of output queues corresponding to one or a plurality of packet destination output lines.

REFERENCES:
patent: 5893162 (1999-04-01), Lau et al.
patent: 6487202 (2002-11-01), Klausmeier et al.
patent: 6611527 (2003-08-01), Moriwaki et al.
patent: 6694388 (2004-02-01), Schzukin et al.
patent: 6735207 (2004-05-01), Prasad et al.
“A 50-Gb/s IP Router” Craig Partridge et al. IEEE/ACM Transaction on Networking, vol. 6, NO Jun. 3, 1998.
C. Partridge, “A 50-Gbsemiconductor IP Router”, IEEE/AGM Transactions on Networking, vol. 6, No. 3, Jun. 1998, pp. 237.

Affiliated with

Also associated with

Rating

Shared buffer type variable length packet switch does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Shared buffer type variable length packet switch, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Shared buffer type variable length packet switch will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3496254